 | 2011 |
|---|
| 7 |       | Frédéric Blanqui,
Claude Helmstetter,
Vania Joloboff,
Jean-François Monin,
Xiaomu Shi:
Designing a CPU model: from a pseudo-formal document to fast code
CoRR abs/1109.4351: (2011) |
| 2009 |
|---|
| 6 | | Hubert Garavel,
Claude Helmstetter,
Olivier Ponsini,
Wendelin Serwe:
Verification of an industrial SystemC/TLM model using LOTOS and CADP.
MEMOCODE 2009: 46-55 |
| 5 | | Claude Helmstetter,
Florence Maraninchi,
Laurent Maillet-Contoz:
Full simulation coverage for SystemC transaction-level models of systems-on-a-chip.
Formal Methods in System Design 35(2): 152-189 (2009) |
| 2008 |
|---|
| 4 | | Jiajia Song,
HongWei Hao,
Claude Helmstetter,
Vania Joloboff:
Generation of Executable Representation for Processor Simulation with Dynamic Translation.
CSSE (4) 2008: 106-109 |
| 3 | | Claude Helmstetter,
Olivier Ponsini:
A Comparison of Two SystemC/TLM Semantics for Formal Verification.
MEMOCODE 2008: 59-68 |
| 2006 |
|---|
| 2 | | Claude Helmstetter,
Florence Maraninchi,
Laurent Maillet-Contoz,
Matthieu Moy:
Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip.
FMCAD 2006: 171-178 |
| 1 | | Claude Helmstetter,
Florence Maraninchi,
Laurent Maillet-Contoz:
Test Coverage for Loose Timing Annotations.
FMICS/PDMC 2006: 100-115 |
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