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| 2011 | ||
|---|---|---|
| 45 | Alejandro Cook, Sybille Hellebrand, Thomas Indlekofer, Hans-Joachim Wunderlich: Diagnostic Test of Robust Circuits. Asian Test Symposium 2011: 285-290 | |
| 44 | Ilia Polian, Bernd Becker, Sybille Hellebrand, Hans-Joachim Wunderlich, Peter C. Maxwell: Towards Variation-Aware Test Methods. European Test Symposium 2011: 219-225 | |
| 43 | Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich: Variation-aware fault modeling. SCIENCE CHINA Information Sciences 54(9): 1813-1826 (2011) | |
| 2010 | ||
| 42 | Fabian Hopsch, Bernd Becker, Sybille Hellebrand, Ilia Polian, Bernd Straube, Wolfgang Vermeiren, Hans-Joachim Wunderlich: Variation-Aware Fault Modeling. Asian Test Symposium 2010: 87-93 | |
| 41 | Thomas Indlekofer, Michael Schnittger, Sybille Hellebrand: Efficient test response compaction for robust BIST using parity sequences. ICCD 2010: 480-485 | |
| 40 | Viktor Froese, Rüdiger Ibers, Sybille Hellebrand: Reusing NoC-infrastructure for test data compression. VTS 2010: 227-231 | |
| 39 | Sybille Hellebrand: Nano-electronic Systems (Nano-elektronische Systeme). it - Information Technology 52(4): 179-180 (2010) | |
| 2009 | ||
| 38 | Sybille Hellebrand, Marc Hunger: Are Robust Circuits Really Robust? DFT 2009: 77-77 | |
| 37 | Marc Hunger, Sybille Hellebrand, Alejandro Czutro, Ilia Polian, Bernd Becker: ATPG-based grading of strong fault-secureness. IOLTS 2009: 269-274 | |
| 2008 | ||
| 36 | Philipp Öhler, Alberto Bosio, Giorgio Di Natale, Sybille Hellebrand: A Modular Memory BIST for Optimized Memory Repair. IOLTS 2008: 171-172 | |
| 35 | Marc Hunger, Sybille Hellebrand: Verification and Analysis of Self-Checking Properties through ATPG. IOLTS 2008: 25-30 | |
| 34 | Uranmandakh Amgalan, Christian Hachmann, Sybille Hellebrand, Hans-Joachim Wunderlich: Signature Rollback - A Technique for Testing Robust Circuits. VTS 2008: 125-130 | |
| 2007 | ||
| 33 | Philipp Öhler, Sybille Hellebrand, Hans-Joachim Wunderlich: Analyzing Test and Repair Times for 2D Integrated Memory Built-in Test and Repair. DDECS 2007: 185-190 | |
| 32 | Sybille Hellebrand, Christian G. Zoellin, Hans-Joachim Wunderlich, Stefan Ludwig, Torsten Coym, Bernd Straube: A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction. DFT 2007: 50-58 | |
| 31 | Philipp Öhler, Sybille Hellebrand, Hans-Joachim Wunderlich: An Integrated Built-In Test and Repair Approach for Memories with 2D Redundancy. European Test Symposium 2007: 91-96 | |
| 30 | Muhammad Ali, Michael Welzl, Sven Hessler, Sybille Hellebrand: An efficient fault tolerant mechanism to deal with permanent and transient failures in a network on chip. IJHPSA 1(2): 113-123 (2007) | |
| 2006 | ||
| 29 | Bernd Becker, Ilia Polian, Sybille Hellebrand, Bernd Straube, Hans-Joachim Wunderlich: DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems). it - Information Technology 48(5): 304- (2006) | |
| 2004 | ||
| 28 | Armin Würtenberger, Christofer S. Tautermann, Sybille Hellebrand: Data Compression for Multiple Scan Chains Using Dictionaries with Corrections. ITC 2004: 926-935 | |
| 2003 | ||
| 27 | Armin Würtenberger, Christofer S. Tautermann, Sybille Hellebrand: A Hybrid Coding Strategy For Optimized Test Data Compression. ITC 2003: 451-459 | |
| 2002 | ||
| 26 | Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik: Efficient Online and Offline Testing of Embedded DRAMs. IEEE Trans. Computers 51(7): 801-809 (2002) | |
| 25 | Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich: A Mixed-Mode BIST Scheme Based on Folding Compression. J. Comput. Sci. Technol. 17(2): 203-212 (2002) | |
| 24 | Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich: Two-Dimensional Test Data Compression for Scan-Based Deterministic BIST. J. Electronic Testing 18(2): 159-170 (2002) | |
| 2001 | ||
| 23 | Huaguo Liang, Sybille Hellebrand, Hans-Joachim Wunderlich: Two-dimensional test data compression for scan-based deterministic BIST. ITC 2001: 894-902 | |
| 22 | Sybille Hellebrand, Huaguo Liang, Hans-Joachim Wunderlich: A Mixed Mode BIST Scheme Based on Reseeding of Folding Counters. J. Electronic Testing 17(3-4): 341-349 (2001) | |
| 2000 | ||
| 21 | Sybille Hellebrand, Hans-Joachim Wunderlich, Huaguo Liang: A mixed mode BIST scheme based on reseeding of folding counters. ITC 2000: 778-784 | |
| 1999 | ||
| 20 | Sybille Hellebrand, Hans-Joachim Wunderlich, Vyacheslav N. Yarmolik: Symmetric Transparent BIST for RAMs. DATE 1999: 702-707 | |
| 19 | Vyacheslav N. Yarmolik, I. V. Bykov, Sybille Hellebrand, Hans-Joachim Wunderlich: Transparent Word-Oriented Memory BIST Based on Symmetric March Algorithms. EDCC 1999: 339-350 | |
| 18 | Sybille Hellebrand, Hans-Joachim Wunderlich, Alexander A. Ivaniuk, Yuri V. Klimets, Vyacheslav N. Yarmolik: Error Detecting Refreshment for Embedded DRAMs. VTS 1999: 384-390 | |
| 1998 | ||
| 17 | Vyacheslav N. Yarmolik, Sybille Hellebrand, Hans-Joachim Wunderlich: Self-Adjusting Output Data Compression: An Efficient BIST Technique for RAMs. DATE 1998: 173-179 | |
| 16 | Andre Hertwig, Sybille Hellebrand, Hans-Joachim Wunderlich: Fast Self-Recovering Controllers. VTS 1998: 296-302 | |
| 15 | Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig: Synthesizing Fast, Online-Testable Control Units. IEEE Design & Test of Computers 15(4): 36-41 (1998) | |
| 14 | Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig: Mixed-Mode BIST Using Embedded Processors. J. Electronic Testing 12(1-2): 127-138 (1998) | |
| 1997 | ||
| 13 | Kun-Han Tsai, Sybille Hellebrand, Janusz Rajski, Malgorzata Marek-Sadowska: STARBIST: Scan Autocorrelated Random Pattern Generation. DAC 1997: 472-477 | |
| 1996 | ||
| 12 | Sybille Hellebrand, Hans-Joachim Wunderlich, Andre Hertwig: Mixed-Mode BIST Using Embedded Processors. ITC 1996: 195-204 | |
| 1995 | ||
| 11 | Sybille Hellebrand, Birgit Reeb, Steffen Tarnick, Hans-Joachim Wunderlich: Pattern generation for a deterministic BIST scheme. ICCAD 1995: 88-94 | |
| 10 | Sybille Hellebrand, Janusz Rajski, Steffen Tarnick, Srikanth Venkataraman, Bernard Courtois: Built-In Test for Circuits with Scan Based on Reseeding of Multiple-Polynomial Linear Feedback Shift Registers. IEEE Trans. Computers 44(2): 223-233 (1995) | |
| 1994 | ||
| 9 | Sybille Hellebrand, Hans-Joachim Wunderlich: Synthesis of Self-Testable Controllers. EDAC-ETC-EUROASIC 1994: 580-585 | |
| 8 | Sybille Hellebrand, Hans-Joachim Wunderlich: An efficient procedure for the synthesis of fast self-testable controller structures. ICCAD 1994: 110-116 | |
| 1992 | ||
| 7 | Sybille Hellebrand, Steffen Tarnick, Bernard Courtois, Janusz Rajski: Generation of Vector Patterns Through Reseeding of Multipe-Polynominal Linear Feedback Shift Registers. ITC 1992: 120-129 | |
| 6 | Hans-Joachim Wunderlich, Sybille Hellebrand: The pseudoexhaustive test of sequential circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 11(1): 26-33 (1992) | |
| 1990 | ||
| 5 | Sybille Hellebrand, Hans-Joachim Wunderlich: Tools and devices supporting the pseudo-exhaustive test. EURO-DAC 1990: 13-17 | |
| 4 | Sybille Hellebrand, Hans-Joachim Wunderlich, Oliver F. Haberl: Generating pseudo-exhaustive vectors for external testing. ITC 1990: 670-679 | |
| 1989 | ||
| 3 | Sybille Hellebrand, Hans-Joachim Wunderlich: The Pseudo-Exhaustive Test of Sequential Circuits. ITC 1989: 19-27 | |
| 1988 | ||
| 2 | Hans-Joachim Wunderlich, Sybille Hellebrand: Generating pattern sequences for the pseudo-exhaustive test of MOS-circuits. FTCS 1988: 36-41 | |
| 1 | Sybille Hellebrand, Hans-Joachim Wunderlich: Automatisierung des Entwurfs vollständig testbarer Schaltungen. GI Jahrestagung (2) 1988: 145-159 | |
Colors in the list of coauthors
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