J. Robert Heath

	2010
13		Veerendra Bhargav Alluri, J. Robert Heath, Michael Lhamon: A new multichannel, coherent amplitude modulated, time-division multiplexed, software-defined radio receiver architecture, and field-programmable-gate-array technology implementation. IEEE Transactions on Signal Processing 58(10): 5369-5384 (2010)
	2009
12		J. Robert Heath, Nien Y. Lim, Kenneth L. Calvert, Jim Griffioen: A New Reconfigurable Network Node Processor Architecture for Distributed Implementation of Ephemeral State Processing. ISCA PDCCS 2009: 213-220
11		J. Robert Heath, Sridhar Hegde, Kanchan Bhide: Development and Validation of a Load Balancing and Control Mechanism for a Reconfigurable Single-Chip Heterogenous and Hybrid Multiprocessor Architecture Platform. ISCA PDCCS 2009: 228-235
	2007
10		Albert T. Wong, J. Robert Heath, Michael Lhamon: New systolic array processor architecture for simultaneous discrete convolution of an image plane with multiple filter coefficient sets. J. Electronic Imaging 16(1): 013014 (2007)
	2001
9		J. Robert Heath, Andrew Tan: Modeling, Design, Virtual and Physical Prototyping, Testing, and Verification of a Multifunctional Processor Queue for a Single-Chip Multiprocessor Architecture. IEEE International Workshop on Rapid System Prototyping 2001: 128-135
	1994
8		Tae Won Cho, Sam S. Pyo, J. Robert Heath: PARALLEX: a parallel approach to switchbox routing. IEEE Trans. on CAD of Integrated Circuits and Systems 13(6): 684-693 (1994)
	1984
7		George Broomell, J. Robert Heath: An Integrated-Circuit Crossbar Switching System Design. ICDCS 1984: 278-287
	1983
6		George Broomell, J. Robert Heath: Classification Categories and Historical Development of Circuit Switching Topologies. ACM Comput. Surv. 15(2): 95-133 (1983)
	1982
5		Andrew D. Hurt, J. Robert Heath: The Design of a Fault-Tolerant Computing Element for Distributed Data Processors. ICDCS 1982: 171-176
4		J. Robert Heath, George Broomell, Andrew D. Hurt: A distributed computer architecture for real-time, data driven applications. ICDCS 1982: 630-638
3		Andrew D. Hurt, J. Robert Heath: A Hardware Task Scheduling Mechanism for a Real-Time Multi-Microprocessor Architecture. IEEE Real-Time Systems Symposium 1982: 113-123
	1980
2		J. Robert Heath, James Cline: The Complexity and Use of a Multistage Interconnection Network for Distributed Processing Systems. IEEE Real-Time Systems Symposium 1980: 28-35
	1977
1		J. Robert Heath, B. D. Carroll, Terry T. Cwik: CDL - A tool for concurrent hardware and software development. DAC 1977: 445-449

Coauthor Index

1	Veerendra Bhargav Alluri	[13]
2	Kanchan Bhide	[11]
3	George Broomell	[4] [6] [7]
4	Kenneth L. Calvert	[12]
5	B. D. Carroll	[1]
6	Tae Won Cho	[8]
7	James Cline	[2]
8	Terry T. Cwik	[1]
9	Jim Griffioen (James Griffioen)	[12]
10	Sridhar Hegde	[11]
11	Andrew D. Hurt	[3] [4] [5]
12	Michael Lhamon	[10] [13]
13	Nien Y. Lim	[12]
14	Sam S. Pyo	[8]
15	Andrew Tan	[9]
16	Albert T. Wong	[10]

Colors in the list of coauthors

Last update Thu May 31 18:55:10 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page