Zhiyuan He

	2010
9		Nima Aghaee, Zhiyuan He, Zebo Peng, Petru Eles: Temperature-Aware SoC Test Scheduling Considering Inter-Chip Process Variation. Asian Test Symposium 2010: 395-398
8		Zhiyuan He, Zebo Peng, Petru Eles: Multi-temperature testing for core-based system-on-chip. DATE 2010: 208-213
	2009
7		Zhiyuan He, Zebo Peng, Petru Eles: Thermal-Aware Test Scheduling for Core-Based SoC in an Abort-on-First-Fail Test Environment. DSD 2009: 239-246
	2008
6		Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinger, Bashir M. Al-Hashimi: Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving. J. Electronic Testing 24(1-3): 247-257 (2008)
	2007
5		Zhiyuan He, Zebo Peng, Petru Eles: A heuristic for thermal-safe SoC test scheduling. ITC 2007: 1-10
	2006
4		Zhiyuan He, Zebo Peng, Petru Eles: Power constrained and defect-probability driven SoC test scheduling with test set partitioning. DATE 2006: 291-296
3		Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinger, Bashir M. Al-Hashimi: Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving. DFT 2006: 477-485
	2005
2		Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles: Power-Constrained Hybrid BIST Test Scheduling in an Abort-on-First-Fail Test Environment. DSD 2005: 83-87
	2004
1		Zhiyuan He, Gert Jervan, Zebo Peng, Petru Eles: Hybrid BIST Test Scheduling Based on Defect Probabilities. Asian Test Symposium 2004: 230-235

Coauthor Index

1	Nima Aghaee	[9]
2	Bashir M. Al-Hashimi	[3] [6]
3	Petru Eles	[1] [2] [3] [4] [5] [6] [7] [8] [9]
4	Gert Jervan	[1] [2]
5	Zebo Peng	[1] [2] [3] [4] [5] [6] [7] [8] [9]
6	Paul M. Rosinger	[3] [6]

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