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| 2009 | ||
|---|---|---|
| 5 | Yajuan He, Chip-Hong Chang: A New Redundant Binary Booth Encoding for Fast 2n-Bit Multiplier Design. IEEE Trans. on Circuits and Systems 56-I(6): 1192-1201 (2009) | |
| 2008 | ||
| 4 | Yajuan He, Chip-Hong Chang: A Power-Delay Efficient Hybrid Carry-Lookahead/Carry-Select Based Redundant Binary to Two's Complement Converter. IEEE Trans. on Circuits and Systems 55-I(1): 336-346 (2008) | |
| 2006 | ||
| 3 | Yajuan He, Chip-Hong Chang: A low-power, high-speed RB-to-NB converter for fast redundant binary multiplier. ISCAS 2006 | |
| 2005 | ||
| 2 | Yajuan He, Chip-Hong Chang, Jiangmin Gu, Hossam A. H. Fahmy: A novel covalent redundant binary Booth encoder. ISCAS (1) 2005: 69-72 | |
| 1 | Yajuan He, Chip-Hong Chang, Jiangmin Gu: An area efficient 64-bit square root carry-select adder for low power applications. ISCAS (4) 2005: 4082-4085 | |
| 1 | Chip-Hong Chang | [1] [2] [3] [4] [5] |
| 2 | Hossam A. H. Fahmy | [2] |
| 3 | Jiangmin Gu | [1] [2] |
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