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| 2012 | ||
|---|---|---|
| 237 | Fang Gong, Sina Basir-Kazeruni, Lara Dolecek, Lei He: A fast estimation of SRAM failure rate using probability collectives. ISPD 2012: 41-48 | |
| 236 | Fang Gong, Xuexin Liu, Hao Yu, Sheldon X.-D. Tan, Junyan Ren, Lei He: A Fast Non-Monte-Carlo Yield Analysis and Optimization by Stochastic Orthogonal Polynomials. ACM Trans. Design Autom. Electr. Syst. 17(1): 10 (2012) | |
| 235 | Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti: Worst-Case Estimation for Data-Dependent Timing Jitter and Amplitude Noise in High-Speed Differential Link. IEEE Trans. VLSI Syst. 20(1): 89-97 (2012) | |
| 234 | Fang Gong, Wenyao Xu, Jueh-Yu Lee, Lei He, Majid Sarrafzadeh: NeuroGlasses: A Neural Sensing Healthcare System for 3-D Vision Technology. IEEE Transactions on Information Technology in Biomedicine 16(2): 198-204 (2012) | |
| 233 | Lei He, Chang-fu Zong, Chang Wang: Driving intention recognition and behaviour prediction based on a double-layer hidden Markov model. Journal of Zhejiang University - Science C 13(3): 208-217 (2012) | |
| 2011 | ||
| 232 | Fang Gong, Hao Yu, Lei He: Fast non-monte-carlo transient noise analysis for high-precision analog/RF circuits by stochastic orthogonal polynomials. DAC 2011: 298-303 | |
| 231 | Naifeng Jing, Ju-Yueh Lee, Chun Zhang, Jiarong Tong, Zhigang Mao, Lei He: Fault modeling and characteristics of SRAM-based FPGAs (abstract only). FPGA 2011: 279 | |
| 230 | Naifeng Jing, Ju-Yueh Lee, Zhe Feng, Weifeng He, Zhigang Mao, Shi-Jie Wen, Rick Wong, Lei He: Quantitative SEU Fault Evaluation for SRAM-Based FPGA Architectures and Synthesis Algorithms. FPL 2011: 282-285 | |
| 229 | Lintao Cui, Jing Chen, Yu Hu, Jinjun Xiong, Zhe Feng, Lei He: Acceleration of Multi-agent Simulation on FPGAs. FPL 2011: 470-473 | |
| 228 | Zhe Feng, Naifeng Jing, GengSheng Chen, Yu Hu, Lei He: IPF: In-Place X-Filling to Mitigate Soft Errors in SRAM-Based FPGAs. FPL 2011: 482-485 | |
| 227 | Lei He, L. Rodney Long, Sameer Antani, George R. Thoma: Multiphase Level Set Model with Local K-means Energy for Histology Image Segmentation. HISB 2011: 32-39 | |
| 226 | Naifeng Jing, Ju-Yueh Lee, Weifeng He, Zhigang Mao, Lei He: Mitigating FPGA interconnect soft errors by in-place LUT inversion. ICCAD 2011: 582-586 | |
| 225 | Fang Gong, Hao Yu, Lei He: Stochastic analog circuit behavior modeling by point estimation method. ISPD 2011: 175-182 | |
| 224 | Lei He: Automatic Construction of RSM Based on XML. SKG 2011: 175-178 | |
| 223 | Lei He, Shauki Elassaad, Yiyu Shi, Yu Hu, Wei Yao: System-in-Package: Electrical and Layout Perspectives. Foundations and Trends in Electronic Design Automation 4(4): 223-306 (2011) | |
| 222 | Ling Cai, Lei He, Takayoshi Yamashita, Yiren Xu, Yuming Zhao, Xin Yang: Robust Contour Tracking by Combining Region and Boundary Information. IEEE Trans. Circuits Syst. Video Techn. 21(12): 1784-1794 (2011) | |
| 221 | Yiyu Shi, Jinjun Xiong, Howard Chen, Lei He: Runtime Resonance Noise Reduction with Current Prediction Enabled Frequency Actuator. IEEE Trans. VLSI Syst. 19(3): 508-512 (2011) | |
| 220 | Lerong Cheng, Puneet Gupta, Costas J. Spanos, Kun Qian, Lei He: Physically Justifiable Die-Level Modeling of Spatial Variation in View of Systematic Across Wafer Variability. IEEE Trans. on CAD of Integrated Circuits and Systems 30(3): 388-401 (2011) | |
| 219 | Wenyao Xu, Jia Wang, Yu Hu, Ju-Yueh Lee, Fang Gong, Lei He, Majid Sarrafzadeh: In-Place FPGA Retiming for Mitigation of Variational Single-Event Transient Faults. IEEE Trans. on Circuits and Systems 58-I(6): 1372-1381 (2011) | |
| 2010 | ||
| 218 | Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He, Minming Li: Fault-tolerant resynthesis with dual-output LUTs. ASP-DAC 2010: 325-330 | |
| 217 | Lerong Cheng, Puneet Gupta, Lei He: On confidence in characterization and application of variation models. ASP-DAC 2010: 751-756 | |
| 216 | Jingshan Huang, Ming Tan, Dejing Dou, Lei He, Christopher Townsend, Patrick J. Hayes: Ontology for MicroRNA Target prediction in human cancer. BCB 2010: 472-474 | |
| 215 | Hongsheng Li, Edward Kim, Xiaolei Huang, Lei He: Object matching with a locally affine-invariant constraint. CVPR 2010: 1641-1648 | |
| 214 | Fang Gong, Hao Yu, Yiyu Shi, Daesoo Kim, Junyan Ren, Lei He: QuickYield: an efficient global-search based parametric yield estimation with performance constraints. DAC 2010: 392-397 | |
| 213 | Manu Jose, Yu Hu, Rupak Majumdar, Lei He: Rewiring for robustness. DAC 2010: 469-474 | |
| 212 | Bingjun Xiao, Yiyu Shi, Lei He: A universal state-of-charge algorithm for batteries. DAC 2010: 687-692 | |
| 211 | Samuel B. Luckenbill, Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He: RALF: Reliability Analysis for Logic Faults - An exact algorithm and its applications. DATE 2010: 783-788 | |
| 210 | Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Building a faster boolean matcher using bloom filter. FPGA 2010: 185-188 | |
| 209 | Jingshan Huang, Dejing Dou, Lei He, Patrick J. Hayes, Jiangbo Dang: Ontology-based knowledge discovery and sharing in bioinformatics and medical informatics: A brief survey. FSKD 2010: 2203-2208 | |
| 208 | Lei He, L. Rodney Long, Sameer Antani, George R. Thoma: Local and global Gaussian mixture models for hematoxylin and eosin stained histology image segmentation. HIS 2010: 223-228 | |
| 207 | Rui Zhao, Y. Kida, Xiang Yan, Pei Ding, Lei He: Using duration and pitch for mandarin digit string recognition. ICASSP 2010: 4846-4849 | |
| 206 | Ju-Yueh Lee, Zhe Feng, Lei He: In-place decomposition for robustness in FPGA. ICCAD 2010: 143-148 | |
| 205 | Yiyu Shi, Lei He: Modeling and design for beyond-the-die power integrity. ICCAD 2010: 411-416 | |
| 204 | Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Engineering a scalable Boolean matching based on EDA SaaS 2.0. ICCAD 2010: 750-755 | |
| 203 | Christopher Townsend, Jingshan Huang, Dejing Dou, Shivraj Dalvi, Patrick J. Hayes, Lei He, Wen-chang Lin, Haishan Liu, Robert Rudnick, Hardik Shah: OMIT: Domain Ontology and Knowledge Acquisition in MicroRNA Target Prediction - (Short Paper). OTM Conferences (2) 2010: 1160-1167 | |
| 202 | Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He, Robi Dutta, Xianlong Hong: Effective congestion reduction for IC package substrate routing. ACM Trans. Design Autom. Electr. Syst. 15(3): (2010) | |
| 201 | Lei He, Scott Schaefer, Kai Hormann: Parameterizing subdivision surfaces. ACM Trans. Graph. 29(4): (2010) | |
| 200 | Yiyu Shi, Lei He: EMPIRE: An Efficient and Compact Multiple-Parameterized Model-Order Reduction Method for Physical Optimization. IEEE Trans. VLSI Syst. 18(1): 108-118 (2010) | |
| 199 | Hao Yu, Chunta Chu, Yiyu Shi, David Smart, Lei He, Sheldon X.-D. Tan: Fast Analysis of a Large-Scale Inductive Interconnect by Block-Structure-Preserved Macromodeling. IEEE Trans. VLSI Syst. 18(10): 1399-1411 (2010) | |
| 198 | Deming Chen, Jason Cong, Chen Dong, Lei He, Fei Li, Chi-Chen Peng: Technology Mapping and Clustering for FPGA Architectures With Dual Supply Voltages. IEEE Trans. on CAD of Integrated Circuits and Systems 29(11): 1709-1722 (2010) | |
| 197 | Zhen Cao, Brian Foo, Lei He, Mihaela van der Schaar: Optimality and Improvement of Dynamic Voltage Scaling Algorithms for Multimedia Applications. IEEE Trans. on Circuits and Systems 57-I(3): 681-690 (2010) | |
| 196 | Chun Zhang, Yu Hu, Lingli Wang, Lei He, Jiarong Tong: Accelerating Boolean Matching Using Bloom Filter. IEICE Transactions 93-A(10): 1775-1781 (2010) | |
| 195 | Lei He, Songfeng Zheng, Li Wang: Integrating local distribution information with level set for boundary extraction. J. Visual Communication and Image Representation 21(4): 343-354 (2010) | |
| 194 | Xian-Zhong Wang, Tao Zhang, Lei He: Application of fuzzy adaptive back-propagation neural network in thermal conductivity gas analyzer. Neurocomputing 73(4-6): 679-683 (2010) | |
| 193 | Ling Cai, Lei He, Yiren Xu, Yuming Zhao, Xin Yang: Multi-object detection and tracking by stereo vision. Pattern Recognition 43(12): 4028-4041 (2010) | |
| 2009 | ||
| 192 | Ling Cai, Yiren Xu, Lei He, Yuming Zhao, Xin Yang: An Effective Segmentation for Noise-Based Image Verification Using Gamma Mixture Models. ACCV (3) 2009: 21-32 | |
| 191 | Yiyu Shi, Wei Yao, Jinjun Xiong, Lei He: Incremental and on-demand random walk for iterative power distribution network analysis. ASP-DAC 2009: 185-190 | |
| 190 | Yiyu Shi, Jinjun Xiong, Howard Chen, Lei He: Stochastic current prediction enabled frequency actuator for runtime resonance noise reduction. ASP-DAC 2009: 373-378 | |
| 189 | Lerong Cheng, Puneet Gupta, Lei He: Accounting for non-linear dependence using function driven component analysis. ASP-DAC 2009: 474-479 | |
| 188 | Lerong Cheng, Puneet Gupta, Costas J. Spanos, Kun Qian, Lei He: Physically justifiable die-level modeling of spatial variation in view of systematic across wafer variability. DAC 2009: 104-109 | |
| 187 | Fang Gong, Hao Yu, Lei He: PiCAP: a parallel and incremental capacitance extraction considering stochastic process variation. DAC 2009: 764-769 | |
| 186 | Zhe Feng, Yu Hu, Lei He, Rupak Majumdar: IPR: In-Place Reconfiguration for FPGA fault tolerance. ICCAD 2009: 105-108 | |
| 185 | Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti: Joint design-time and post-silicon optimization for digitally tuned analog circuits. ICCAD 2009: 725-730 | |
| 184 | Lei He, Juan Li, Qing Wang, Ye Yang: Predicting Upgrade Project Defects Based on Enhancement Requirements: An Empirical Study. ICSP 2009: 268-279 | |
| 183 | Songhe Jin, Baowei Song, Lei He: Recommendation of Online Tasks Based on Witkey Mode Website. IFITA (3) 2009: 268-270 | |
| 182 | Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He, Robi Dutta, Xianlong Hong: Diffusion-driven congestion reduction for substrate topological routing. ISPD 2009: 175-180 | |
| 181 | Wei Yao, Yiyu Shi, Lei He, Sudhakar Pamarti, Yu Hu: Worst case timing jitter and amplitude noise in differential signaling. ISQED 2009: 40-46 | |
| 180 | Ju-Yueh Lee, Yu Hu, Rupak Majumdar, Lei He: Simultaneous test pattern compaction, ordering and X-filling for testing power reduction. ISQED 2009: 702-707 | |
| 179 | Lei He, William G. Wee, Songfeng Zheng, Li Wang: A level set model without initial contour. WACV 2009: 1-6 | |
| 178 | Hao Yu, Joanna Ho, Lei He: Allocating power ground vias in 3D ICs for simultaneous power and thermal integrity. ACM Trans. Design Autom. Electr. Syst. 14(3): (2009) | |
| 177 | Hao Yu, Lei He, Mau-Chung Frank Chang: Robust On-Chip Signaling by Staggered and Twisted Bundle. IEEE Design & Test of Computers 26(5): 92-104 (2009) | |
| 176 | Lerong Cheng, Jinjun Xiong, Lei He: Non-Gaussian Statistical Timing Analysis Using Second-Order Polynomial Fitting. IEEE Trans. on CAD of Integrated Circuits and Systems 28(1): 130-140 (2009) | |
| 175 | Lerong Cheng, Puneet Gupta, Lei He: Efficient Additive Statistical Leakage Estimation. IEEE Trans. on CAD of Integrated Circuits and Systems 28(11): 1777-1781 (2009) | |
| 174 | Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He, Tianpei Zhang, Robi Dutta, Xianlong Hong: Substrate Topological Routing for High-Density Packages. IEEE Trans. on CAD of Integrated Circuits and Systems 28(2): 207-216 (2009) | |
| 173 | Yu Hu, Satyaki Das, Steven Trimberger, Lei He: Design and Synthesis of Programmable Logic Block With Mixed LUT and Macrogate. IEEE Trans. on CAD of Integrated Circuits and Systems 28(4): 591-595 (2009) | |
| 172 | Li Wang, Lei He, Arabinda Mishra, Chunming Li: Active contours driven by local Gaussian distribution fitting energy. Signal Processing 89(12): 2435-2447 (2009) | |
| 2008 | ||
| 171 | Lerong Cheng, Jinjun Xiong, Lei He: Non-Gaussian statistical timing analysis using second-order polynomial fitting. ASP-DAC 2008: 298-303 | |
| 170 | Lei He, Chunming Li, Chenyang Xu: Intensity statistics-based HSI diffusion for color photo denoising. CVPR 2008 | |
| 169 | Zhen Cao, Brian Foo, Lei He, Mihaela van der Schaar: Optimality and improvement of dynamic voltage scaling algorithms for multimedia applications. DAC 2008: 179-184 | |
| 168 | Yu Hu, Victor Shih, Rupak Majumdar, Lei He: FPGA area reduction by multi-output function based sequential resynthesis. DAC 2008: 24-29 | |
| 167 | Shenghua Liu, Guoqiang Chen, Tom Tong Jing, Lei He, Tianpei Zhang, Robi Dutta, Xianlong Hong: Topological routing to maximize routability for package substrate. DAC 2008: 566-569 | |
| 166 | Lei He, Xiangjie Ma, Weili Zhang, Yunfei Guo, Hailong Ma: The Analysis and Simulation of a Hybrid Video Broadcast Architecture. EUC (2) 2008: 524-531 | |
| 165 | Lerong Cheng, Yan Lin, Lei He: Trace-based framework for concurrent development of process and FPGA architecture considering process variation and reliability. FPGA 2008: 159-168 | |
| 164 | Lei He, Xiangjie Ma, Weili Zhang, Yunfei Guo, Wenbo Liu: A Video Broadcast Architecture with Server Placement Programming. GridNets 2008: 130-137 | |
| 163 | Lei He, Xiangjie Ma, Wenbo Liu, Yunfei Guo: A Peer-to-Peer Internet Video Broadcast System Utilizing the Locality Properties. HPCC 2008: 404-411 | |
| 162 | Xiangjie Ma, Lei He, Xiaozhuo Gu, Julong Lan, Baisheng Zhang: Study on a Novel Scheduling Algorithm ofthe Multiple-Plane and Multiple-Stage Switching Fabric. HPCC 2008: 412-417 | |
| 161 | Yingjian Zhi, Na Wang, Binqiang Wang, Lei He: Urgency-Based Batching Policy for Streaming Media. HPCC 2008: 580-585 | |
| 160 | Xiangjie Ma, Xiaozhuo Gu, Lei He, Julong Lan, Baisheng Zhang: Performance Study on the MPMS Fabric: A Novel Parallel and Distributed Switching System Architecture. HPCC 2008: 69-76 | |
| 159 | Yu Hu, Zhe Feng, Lei He, Rupak Majumdar: Robust FPGA resynthesis based on fault-tolerant Boolean matching. ICCAD 2008: 706-713 | |
| 158 | Lei He, Chenyang Xu: Color Photo Denoising Via Hue, Saturation and Intensity Diffusion. ICIAR 2008: 159-169 | |
| 157 | Lei He: Spatially varying weighted HSI diffusion for color image denoising. ICIP 2008: 581-584 | |
| 156 | Lei He, Xiangjie Ma, Weili Zhang, Yunfei Guo, Hailong Ma: MTreeTV: A Hybrid Video Broadcast Architecture. MSN 2008: 219-226 | |
| 155 | Lei He, Ashraf Saad, Joy Reed, Patrick Hannigan, Edward Strauser: Information technology education for k-12 students and teachers: from sensor network to comprehensive and customized web interaction. SIGITE Conference 2008: 65-70 | |
| 154 | Ashraf Saad, Lei He, Joy Reed, Edward Strauser, Patrick Hannigan: Ossabest: a comprehensive itest project for middle and high school teachers and students. SIGITE Conference 2008: 71-76 | |
| 153 | Yu Hu, Yan Lin, Lei He, Tim Tuan: Physical synthesis for FPGA interconnect power reduction by dual-Vdd budgeting and retiming. ACM Trans. Design Autom. Electr. Syst. 13(2): (2008) | |
| 152 | Hao Yu, Yiyu Shi, Lei He, Tanay Karnik: Thermal Via Allocation for 3-D ICs Considering Temporally and Spatially Variant Thermal Power. IEEE Trans. VLSI Syst. 16(12): 1609-1619 (2008) | |
| 151 | Yan Lin, Lei He, Mike Hutton: Stochastic Physical Synthesis Considering Prerouting Interconnect Uncertainty and Process Variation for FPGAs. IEEE Trans. VLSI Syst. 16(2): 124-133 (2008) | |
| 150 | Yu Hu, Victor Shih, Rupak Majumdar, Lei He: Exploiting Symmetries to Speed Up SAT-Based Boolean Matching for Logic Synthesis of FPGAs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1751-1760 (2008) | |
| 149 | Zhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Zhe Feng, Lei He, Xianlong Hong: Fashion: A Fast and Accurate Solution to Global Routing Problem. IEEE Trans. on CAD of Integrated Circuits and Systems 27(4): 726-737 (2008) | |
| 148 | Yiyu Shi, Jinjun Xiong, Chunchen Liu, Lei He: Efficient Decoupling Capacitance Budgeting Considering Operation and Process Variations. IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1253-1263 (2008) | |
| 147 | King Ho Tam, Yu Hu, Lei He, Tom Tong Jing, Xinyi Zhang: Dual-Vdd Buffer Insertion for Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 27(8): 1498-1502 (2008) | |
| 146 | Lei He, Zhigang Peng, Bryan Everding, Xun Wang, Chia Y. Han, Kenneth L. Weiss, William G. Wee: A comparative study of deformable contour methods on medical image segmentation. Image Vision Comput. 26(2): 141-163 (2008) | |
| 2007 | ||
| 145 | Lei He, Patricia Brandt: WEAS: a web-based educational assessment system. ACM Southeast Regional Conference 2007: 126-131 | |
| 144 | Zhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Lei He, Xianlong Hong: DpRouter: A Fast and Accurate Dynamic-Pattern-Based Global Routing Algorithm. ASP-DAC 2007: 256-261 | |
| 143 | Yi Liu, Fang Zheng, Lei He, Yunqing Xia: State-dependent mixture tying with variable codebook size for accented speech recognition. ASRU 2007: 300-305 | |
| 142 | Lerong Cheng, Jinjun Xiong, Lei He: Non-Linear Statistical Static Timing Analysis for Non-Gaussian Variation Sources. DAC 2007: 250-255 | |
| 141 | Hao Yu, Chunta Chu, Lei He: Off-chip Decoupling Capacitor Allocation for Chip Package Co-Design. DAC 2007: 618-621 | |
| 140 | Yan Lin, Lei He: Interactive presentation: Statistical dual-Vdd assignment for FPGA interconnect power reduction. DATE 2007: 636-641 | |
| 139 | Yan Lin, Lei He: Stochastic physical synthesis for FPGAs with pre-routing interconnect uncertainty and process variation. FPGA 2007: 80-88 | |
| 138 | Yu Hu, Satyaki Das, Steven Trimberger, Lei He: Design, synthesis and evaluation of heterogeneous FPGA with mixed LUTs and macro-gates. ICCAD 2007: 188-193 | |
| 137 | Yan Lin, Lei He: Device and architecture concurrent optimization for FPGA transient soft error rate. ICCAD 2007: 194-198 | |
| 136 | Yu Hu, Victor Shih, Rupak Majumdar, Lei He: Exploiting symmetry in SAT-based Boolean matching for heterogeneous FPGA technology mapping. ICCAD 2007: 350-353 | |
| 135 | Chunta Chu, Xinyi Zhang, Lei He, Tong Jing: Temperature aware microprocessor floorplanning considering application dependent power load. ICCAD 2007: 586-589 | |
| 134 | Yiyu Shi, Jinjun Xiong, Chunchen Liu, Lei He: Efficient decoupling capacitance budgeting considering operation and process variations. ICCAD 2007: 803-810 | |
| 133 | Lei He, Chuanjiang Luo, Feng Zhu, Yingming Hao, Jinjun Ou, Jing Zhou: Depth Map Regeneration via Improved Graph Cuts Using a Novel Omnidirectional Stereo Sensor. ICCV 2007: 1-8 | |
| 132 | Lei He, Feng Zhu, Yingming Hao: A Comparative Study on Pose Estimation for Monocular Vision and Binocular Vision Without Modeling. IPCV 2007: 627-631 | |
| 131 | Hao Yu, Yu Hu, Chunchen Liu, Lei He: Minimal skew clock embedding considering time variant temperature gradient. ISPD 2007: 173-180 | |
| 130 | Yiyu Shi, Lei He: Empire: an efficient and compact multiple-parameterized model order reduction method. ISPD 2007: 51-58 | |
| 129 | Lei He, Chuanjiang Luo, Yanfeng Geng, Feng Zhu, Yingming Hao: Reliable Depth Map Regeneration Via a Novel Omnidirectional Stereo Sensor. ISVC (1) 2007: 278-287 | |
| 128 | Yu Hu, King Ho Tam, Tong Jing, Lei He: Fast dual-vdd buffering based on interconnect prediction and sampling. SLIP 2007: 95-102 | |
| 127 | Yiyu Shi, Paul Mesa, Hao Yu, Lei He: Circuit-simulated obstacle-aware Steiner routing. ACM Trans. Design Autom. Electr. Syst. 12(3): (2007) | |
| 126 | Changbo Long, Lucanus J. Simonson, Weiping Liao, Lei He: Microarchitecture Configurations and Floorplanning Co-Optimization. IEEE Trans. VLSI Syst. 15(7): 830-841 (2007) | |
| 125 | Jinjun Xiong, Vladimir Zolotov, Lei He: Robust Extraction of Spatial Correlation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 619-631 (2007) | |
| 124 | Jun Chen, Lei He: Efficient In-Package Decoupling Capacitor Optimization for I/O Power Integrity. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 734-738 (2007) | |
| 123 | Jinjun Xiong, Lei He: Probabilistic Transitive-Closure Ordering and Its Application on Variational Buffer Insertion. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 739-742 (2007) | |
| 122 | Fei Li, Yan Lin, Lei He: Field Programmability of Supply Voltages for FPGA Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 26(4): 752-764 (2007) | |
| 121 | Lei He, Andrew B. Kahng, King Ho Tam, Jinjun Xiong: Simultaneous Buffer Insertion and Wire Sizing Considering Systematic CMP Variation and Random Leff Variation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 845-857 (2007) | |
| 120 | Lerong Cheng, Fei Li, Yan Lin, Phoebe Wong, Lei He: Device and Architecture Cooptimization for FPGA Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 26(7): 1211-1221 (2007) | |
| 119 | Pu Liu, Sheldon X.-D. Tan, Bruce McGaughy, Lifeng Wu, Lei He: TermMerg: An Efficient Terminal-Reduction Method for Interconnect Circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 26(8): 1382-1392 (2007) | |
| 118 | Yan Lin, Mike Hutton, Lei He: Statistical placement for FPGAs considering. IET Computers & Digital Techniques 1(4): 267-275 (2007) | |
| 117 | Jinjun Xiong, Lei He: Full-chip multilevel routing for power and signal integrity. Integration 40(3): 226-234 (2007) | |
| 2006 | ||
| 116 | Jinjun Xiong, Yiu-Chung Wong, Egino Sarto, Lei He: Constraint driven I/O planning and placement for chip-package co-design. ASP-DAC 2006: 207-212 | |
| 115 | Yiyu Shi, Tong Jing, Lei He, Zhe Feng, Xianlong Hong: CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model. ASP-DAC 2006: 630-635 | |
| 114 | Hao Yu, Yiyu Shi, Lei He: Fast analysis of structured power grid by triangularization based structure preserving model order reduction. DAC 2006: 205-210 | |
| 113 | Yiyu Shi, Paul Mesa, Hao Yu, Lei He: Circuit simulation based obstacle-aware Steiner routing. DAC 2006: 385-388 | |
| 112 | Yu Hu, Yan Lin, Lei He, Tim Tuan: Simultaneous time slack budgeting and retiming for dual-Vdd FPGA power reduction. DAC 2006: 478-483 | |
| 111 | Lerong Cheng, Jinjun Xiong, Lei He, Mike Hutton: FPGA Performance Optimization Via Chipwise Placement Considering Process Variations. FPL 2006: 1-6 | |
| 110 | Mike Hutton, Yan Lin, Lei He: Placement and Timing for FPGAs Considering Variations. FPL 2006: 1-7 | |
| 109 | Hao Yu, Yiyu Shi, Lei He, David Smart: A fast block structure preserving model order reduction for inverse inductance circuits. ICCAD 2006: 7-12 | |
| 108 | Hao Yu, Joanna Ho, Lei He: Simultaneous power and thermal integrity driven via stapling in 3D ICs. ICCAD 2006: 802-808 | |
| 107 | Lei He, Chia Y. Han, William G. Wee: Object Recognition and Recovery by Skeleton Graph Matching. ICME 2006: 993-996 | |
| 106 | Lei He, Jie Hao: A tone recognition framework for continuous Mandarin speech. INTERSPEECH 2006 | |
| 105 | Pei Ding, Lei He, Xiang Yan, Jie Hao: Robust automatic speech recognition for accented Mandarin in car environments. INTERSPEECH 2006 | |
| 104 | Hao Yu, Yiyu Shi, Lei He, Tanay Karnik: Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power. ISLPED 2006: 156-161 | |
| 103 | Yan Lin, Yu Hu, Lei He, Vijay Raghunat: An efficient chip-level time slack allocation algorithm for Dual-Vdd FPGA power reduction. ISLPED 2006: 168-173 | |
| 102 | Changbo Long, Sasank Reddy, Sudhakar Pamarti, Lei He, Tanay Karnik: Power-efficient pulse width modulation DC/DC converters with zero voltage switching control. ISLPED 2006: 326-329 | |
| 101 | Jinjun Xiong, Lei He: Fast buffer insertion considering process variations. ISPD 2006: 128-135 | |
| 100 | Jinjun Xiong, Vladimir Zolotov, Lei He: Robust extraction of spatial correlation. ISPD 2006: 2-9 | |
| 99 | Yiyu Shi, Hao Yu, Lei He: SAMSON: a generalized second-order arnoldi method for reducing multiple source linear network with susceptance. ISPD 2006: 25-32 | |
| 98 | Jun Chen, Lei He: Noise driven in-package decoupling capacitor optimization for power integrity. ISPD 2006: 94-101 | |
| 97 | Pei Ding, Lei He, Xiang Yan, Rui Zhao, Jie Hao: Robust Mandarin Speech Recognition for Car Navigation Interface. PCM 2006: 302-309 | |
| 96 | Yan Lin, Lei He: Dual-Vdd Interconnect With Chip-Level Time Slack Allocation for FPGA Power Reduction. IEEE Trans. on CAD of Integrated Circuits and Systems 25(10): 2023-2034 (2006) | |
| 95 | Zhenyu Qi, Hao Yu, Pu Liu, Sheldon X.-D. Tan, Lei He: Wideband passive multiport model order reduction and realization of RLCM circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 25(8): 1496-1509 (2006) | |
| 94 | Jun Chen, Lei He: Modeling and synthesis of multiport transmission line for multichannel communication. IEEE Trans. on CAD of Integrated Circuits and Systems 25(9): 1664-1676 (2006) | |
| 2005 | ||
| 93 | Hao Yu, Lei He, Zhenyu Qi, Sheldon X.-D. Tan: A wideband hierarchical circuit reduction for massively coupled interconnects. ASP-DAC 2005: 111-114 | |
| 92 | Tong Jing, Ling Zhang, Jinghong Liang, Jingyu Xu, Xianlong Hong, Jinjun Xiong, Lei He: A Min-area Solution to Performance and RLC Crosstalk Driven Global Routing Problem. ASP-DAC 2005: 115-120 | |
| 91 | Zhenyu Qi, Sheldon X.-D. Tan, Hao Yu, Lei He: Wideband modeling of RF/Analog circuits via hierarchical multi-point model order reduction. ASP-DAC 2005: 224-229 | |
| 90 | Yan Lin, Fei Li, Lei He: Routing track duplication with fine-grained power-gating for FPGA interconnect power reduction. ASP-DAC 2005: 645-650 | |
| 89 | Jinjun Xiong, Lei He: Probabilistic congestion model considering shielding for crosstalk reduction. ASP-DAC 2005: 739-742 | |
| 88 | Bodo Rosenhahn, Lei He, Reinhard Klette: Automatic Human Model Generation. CAIP 2005: 41-48 | |
| 87 | King Ho Tam, Lei He: Power optimal dual-Vdd buffered tree considering buffer stations and blockages. DAC 2005: 497-502 | |
| 86 | Yan Lin, Lei He: Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction. DAC 2005: 720-725 | |
| 85 | Lerong Cheng, Phoebe Wong, Fei Li, Yan Lin, Lei He: Device and architecture co-optimization for FPGA power reduction. DAC 2005: 915-920 | |
| 84 | Jennifer L. Wong, Weiping Liao, Fei Li, Lei He, Miodrag Potkonjak: Scheduling of Soft Real-Time Systems for Context-Aware Applications. DATE 2005: 318-323 | |
| 83 | Jinjun Xiong, King Ho Tam, Lei He: Buffer Insertion Considering Process Variation. DATE 2005: 970-975 | |
| 82 | Yan Lin, Fei Li, Lei He: Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability. FPGA 2005: 199-207 | |
| 81 | Ho-Yan Wong, Lerong Cheng, Yan Lin, Lei He: FPGA device and architecture evaluation considering process variations. ICCAD 2005: 19-24 | |
| 80 | Pu Liu, Sheldon X.-D. Tan, Hang Li, Zhenyu Qi, Jun Kong, Bruce McGaughy, Lei He: An efficient method for terminal reduction of interconnect circuits considering delay variations. ICCAD 2005: 821-826 | |
| 79 | Bin Chen, Lei He, Ping Liu: A Morphological Edge Detector for Gray-Level Image Thresholding. ICIAR 2005: 659-666 | |
| 78 | Hao Yu, Lei He: A sparsified vector potential equivalent circuit model for massively coupled interconnects. ISCAS (1) 2005: 105-108 | |
| 77 | Yu Ching Chang, King Ho Tam, Lei He: Power-optimal repeater insertion considering Vdd and Vth as design freedoms. ISLPED 2005: 137-142 | |
| 76 | Lei He, Mike Hutton, Tim Tuan, Steven J. E. Wilton: Challenges and opportunities for low power FPGAs in nanometer technologies. ISLPED 2005: 90 | |
| 75 | Lei He, Andrew B. Kahng, King Ho Tam, Jinjun Xiong: Simultaneous buffer insertion and wire sizing considering systematic CMP variation and random leff variation. ISPD 2005: 78-85 | |
| 74 | Anirudh Devgan, Luca Daniel, Byron Krauter, Lei He: Modeling and Design of Chip-Package Interface. ISQED 2005: 6 | |
| 73 | Hao Yu, Lei He: Staggered Twisted-Bundle Interconnect for Crosstalk and Delay Reduction. ISQED 2005: 682-687 | |
| 72 | Lei Zhu, Lei He, Alex Collier: MAPIS: A Mobile Amphibian Population Information System. ITCC (2) 2005: 254-259 | |
| 71 | Lucanus J. Simonson, Lei He: Micro-architecture Performance Estimation by Formula. SAMOS 2005: 192-201 | |
| 70 | Weiping Liao, Joseph M. Basile, Lei He: Microarchitecture-level leakage reduction with data retention. IEEE Trans. VLSI Syst. 13(11): 1324-1328 (2005) | |
| 69 | Jinjun Xiong, Lei He: Extended global routing with RLC crosstalk constraints. IEEE Trans. VLSI Syst. 13(3): 319-329 (2005) | |
| 68 | Yan Lin, Fei Li, Lei He: Circuits and architectures for field programmable gate array with configurable supply voltage. IEEE Trans. VLSI Syst. 13(9): 1035-1047 (2005) | |
| 67 | Fei Li, Yizhou Lin, Lei He, Deming Chen, Jason Cong: Power modeling and characteristics of field programmable gate arrays. IEEE Trans. on CAD of Integrated Circuits and Systems 24(11): 1712-1724 (2005) | |
| 66 | Jun Chen, Lei He: Piecewise linear model for transmission line with capacitive loading and ramp input. IEEE Trans. on CAD of Integrated Circuits and Systems 24(6): 928-937 (2005) | |
| 65 | Weiping Liao, Lei He, Kevin M. Lepak: Temperature and supply Voltage aware performance and power modeling at microarchitecture level. IEEE Trans. on CAD of Integrated Circuits and Systems 24(7): 1042-1053 (2005) | |
| 64 | Jun Chen, Lei He: Worst case crosstalk noise for nonswitching victims in high-speed buses. IEEE Trans. on CAD of Integrated Circuits and Systems 24(8): 1275-1283 (2005) | |
| 63 | Hao Yu, Lei He: A provably passive and cost-efficient model for inductive interconnects. IEEE Trans. on CAD of Integrated Circuits and Systems 24(8): 1283-1294 (2005) | |
| 62 | Weiping Liao, Lei He: Microarchitecture Level Interconnect Modeling Considering Layout Optimization. J. Low Power Electronics 1(3): 297-308 (2005) | |
| 2004 | ||
| 61 | Jun Chen, Lei He: Modeling of coplanar waveguide for buffered clock tree. ASP-DAC 2004: 367-372 | |
| 60 | Fei Li, Lei He, Joseph M. Basile, Rakesh J. Patel, Hema Ramamurthy: High-level area and power-up current estimation considering rich cell library. ASP-DAC 2004: 899-904 | |
| 59 | Lei He, Weiping Liao, Mircea R. Stan: System level leakage reduction considering the interdependence of temperature and leakage. DAC 2004: 12-17 | |
| 58 | Changbo Long, Lucanus J. Simonson, Weiping Liao, Lei He: Floorplanning optimization with trajectory piecewise-linear model for pipelined interconnects. DAC 2004: 640-645 | |
| 57 | Fei Li, Yan Lin, Lei He: FPGA power reduction using configurable dual-Vdd. DAC 2004: 735-740 | |
| 56 | Jinjun Xiong, Lei He: Full-Chip Multilevel Routing for Power and Signal Integrity. DATE 2004: 1116-1123 | |
| 55 | Deming Chen, Jason Cong, Fei Li, Lei He: Low-power technology mapping for FPGA architectures with dual supply voltages. FPGA 2004: 109-117 | |
| 54 | Fei Li, Yan Lin, Lei He, Jason Cong: Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics. FPGA 2004: 42-50 | |
| 53 | Fei Li, Yan Lin, Lei He: Vdd programmability to reduce FPGA interconnect power. ICCAD 2004: 760-765 | |
| 52 | Lei He, Tulika Mitra, Weng-Fai Wong: Configuration bitstream compression for dynamically reconfigurable FPGAs. ICCAD 2004: 766-773 | |
| 51 | Xin Zhao, Yici Cai, Qiang Zhou, Xianlong Hong, Lei He, Jinjun Xiong: Shielding area optimization under the solution of interconnect crosstalk. ISCAS (5) 2004: 297-300 | |
| 50 | Ling Zhang, Tong Jing, Xianlong Hong, Jingyu Xu, Jinjun Xiong, Lei He: Performance and RLC crosstalk driven global routing. ISCAS (5) 2004: 65-68 | |
| 49 | Changbo Long, Jinjun Xiong, Lei He: On optimal physical synthesis of sleep transistors. ISPD 2004: 156-161 | |
| 48 | Lucanus J. Simonson, King Ho Tam, Nataraj Akkiraju, Mosur Mohan, Lei He: Leveraging Delay Slack in Flip-Flop and Buffer Insertion for Power Reduction. ISQED 2004: 69-74 | |
| 47 | Kevin M. Lepak, Min Xu, Jun Chen, Lei He: Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization. ACM Trans. Design Autom. Electr. Syst. 9(3): 290-309 (2004) | |
| 46 | Changbo Long, Lei He: Distributed sleep transistor network for power reduction. IEEE Trans. VLSI Syst. 12(9): 937-946 (2004) | |
| 45 | Jinjun Xiong, Lei He: Full-chip routing optimization with RLC crosstalk budgeting. IEEE Trans. on CAD of Integrated Circuits and Systems 23(3): 366-377 (2004) | |
| 44 | Xun Wang, Lei He, William G. Wee: Deformable Contour Method: A Constrained Optimization Approach. International Journal of Computer Vision 59(1): 87-108 (2004) | |
| 43 | Lei He, Chia Y. Han, Bryan Everding, William G. Wee: Graph matching for object recognition and recovery. Pattern Recognition 37(7): 1557-1560 (2004) | |
| 2003 | ||
| 42 | Changbo Long, Lei He: Distributed sleep transistor network for power reduction. DAC 2003: 181-186 | |
| 41 | Hao Yu, Lei He: Vector potential equivalent circuit based on PEEC inversion. DAC 2003: 718-723 | |
| 40 | Fei Li, Deming Chen, Lei He, Jason Cong: Architecture evaluation for power-efficient FPGAs. FPGA 2003: 175-184 | |
| 39 | Weiping Liao, Lei He: Full-Chip Interconnect Power Estimation and Simulation Considering Concurrent Repeater and Flip-Flop Insertion. ICCAD 2003: 574-580 | |
| 38 | Weiping Liao, Fei Li, Lei He: Microarchitecture level power and thermal simulation considering temperature dependent leakage model. ISLPED 2003: 211-216 | |
| 37 | Weiping Liao, Lei He: Coupled Power and Thermal Simulation with Active Cooling. PACS 2003: 148-163 | |
| 36 | Fei Li, Lei He, Joseph M. Basile, Rakesh Patel, Hema Ramamurthy: High Level Area and Current Estimation. PATMOS 2003: 259-268 | |
| 35 | Xun Wang, Lei He, Yingjie Tang, William G. Wee: A divide and conquer deformable contour method with a model based searching algorithm. IEEE Transactions on Systems, Man, and Cybernetics, Part B 33(5): 738-751 (2003) | |
| 2002 | ||
| 34 | Jun Chen, Lei He: A decoupling method for analysis of coupled RLC interconnects. ACM Great Lakes Symposium on VLSI 2002: 41-46 | |
| 33 | Xun Wang, Lei He, Chia Y. Han, William G. Wee: Deformable contour method: a constrained optimization approach. BMVC 2002 | |
| 32 | James D. Z. Ma, Lei He: Towards global routing with RLC crosstalk constraints. DAC 2002: 669-672 | |
| 31 | Lei He, Hongya Ge: Systematic design of multiple-symbol detection scheme for systems with. ICASSP 2002: 4181 | |
| 30 | Jinjun Xiong, Jun Chen, James Ma, Lei He: Post global routing RLC crosstalk budgeting. ICCAD 2002: 504-509 | |
| 29 | Weiping Liao, Joseph M. Basile, Lei He: Leakage power modeling and reduction with data retention. ICCAD 2002: 714-719 | |
| 28 | Xun Wang, Lei He, William G. Wee: Constrained optimization: a geodesic snake approach. ICIP (2) 2002: 77-80 | |
| 27 | Lei He, Chia Y. Han, Xun Wang, Xiaokun Li, William G. Wee: A skeleton based shape matching and recovery approach. ICIP (3) 2002: 789-792 | |
| 26 | Xiaokun Li, Feng Gao, Bryan Everding, Lei He, William G. Wee: Error analysis, modeling, and correction for 3-D range data. ICIP (3) 2002: 873-876 | |
| 25 | Jun Chen, Lei He: Determination of worst-case crosstalk noise for non-switching victims in GHz+ buses. Timing Issues in the Specification and Synthesis of Digital Systems 2002: 92-97 | |
| 24 | Fei Li, Lei He, Kewal K. Saluja: Estimation of Maximum Power-Up Current. VLSI Design 2002: 51- | |
| 2001 | ||
| 23 | Min Xu, Lei He: An efficient model for frequency-dependent on-chip inductance. ACM Great Lakes Symposium on VLSI 2001: 115-120 | |
| 22 | Liang Yin, Lei He: An efficient analytical model of coupled on-chip RLC interconnects. ASP-DAC 2001: 385-390 | |
| 21 | Kevin M. Lepak, Irwan Luwandi, Lei He: Simultaneous Shield Insertion and Net Ordering under Explicit RLC Noise Constraint. DAC 2001: 199-202 | |
| 20 | James D. Z. Ma, Lei He: Formulae and Applications of Interconnect Estimation Considering Shield Insertion and Net Ordering. ICCAD 2001: 327-332 | |
| 19 | James D. Z. Ma, Arvind Parihar, Lei He: Pre-routing Estimation of Shielding for RLC Signal Integrity. ICCD 2001: 553-556 | |
| 18 | Fei Li, Lei He: Maximum current estimation considering power gating. ISPD 2001: 106-111 | |
| 17 | Zhenyu Tang, Lei He, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa: Instruction Prediction for Step Power Reduction. ISQED 2001: 211-216 | |
| 16 | James D. Z. Ma, Lei He: Simultaneous signal and power routing under K model. SLIP 2001: 175-182 | |
| 15 | Jason Cong, Lei He, Cheng-Kok Koh, David Zhigang Pan: Interconnect sizing and spacing with consideration of couplingcapacitance. IEEE Trans. on CAD of Integrated Circuits and Systems 20(9): 1164-1169 (2001) | |
| 2000 | ||
| 14 | Yingjie Tang, Lei He, Xun Wang, William G. Wee: A Model Based Contour Searching Method. BIBE 2000: 347-354 | |
| 13 | Norman Chang, Shen Lin, O. Sam Nakagawa, Weize Xie, Lei He: Clocktree RLC Extraction with Efficient Inductance Modeling. DATE 2000: 522-526 | |
| 12 | Lei He, Ditang Fang, Wenhu Wu: Speaker normalization training and adaptation for speech recognition. INTERSPEECH 2000: 342-345 | |
| 11 | Lei He, Kevin M. Lepak: Simultaneous shield insertion and net ordering for capacitive and inductive coupling minimization. ISPD 2000: 55-60 | |
| 10 | Zhenyu Tang, Norman Chang, Shen Lin, Weize Xie, O. Sam Nakagawa, Lei He: Ramp Up/Down Functional Unit to Reduce Step Power. PACS 2000: 13-24 | |
| 1999 | ||
| 9 | Jason Cong, Lei He: Theory and algorithm of local-refinement-based optimization with application to device and interconnect sizing. IEEE Trans. on CAD of Integrated Circuits and Systems 18(4): 406-420 (1999) | |
| 1998 | ||
| 8 | Jason Cong, Lei He: An efficient technique for device and interconnect optimization in deep submicron designs. ISPD 1998: 45-51 | |
| 1997 | ||
| 7 | Jason Cong, Lei He, Andrew B. Kahng, David Noice, Nagesh Shirali, Steve H.-C. Yen: Analysis and Justification of a Simple, Practical 2 1/2-D Capacitance Extraction Methodology. DAC 1997: 627-632 | |
| 6 | Jason Cong, David Zhigang Pan, Lei He, Cheng-Kok Koh, Kei-Yong Khoo: Interconnect design for deep submicron ICs. ICCAD 1997: 478-485 | |
| 5 | Jason Cong, Lei He, Cheng-Kok Koh, David Zhigang Pan: Global interconnect sizing and spacing with consideration of coupling capacitance. ICCAD 1997: 628-633 | |
| 1996 | ||
| 4 | Jason Cong, Lei He: An efficient approach to simultaneous transistor and interconnect sizing. ICCAD 1996: 181-186 | |
| 3 | Jason Cong, Lei He: Optimal wiresizing for interconnects with multiple sources. ACM Trans. Design Autom. Electr. Syst. 1(4): 478-511 (1996) | |
| 2 | Jason Cong, Lei He, Cheng-Kok Koh, Patrick H. Madden: Performance optimization of VLSI interconnect layout. Integration 21(1-2): 1-94 (1996) | |
| 1995 | ||
| 1 | Jason Cong, Lei He: Optimal wiresizing for interconnects with multiple sources. ICCAD 1995: 568-574 | |
Colors in the list of coauthors
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