Hu He

	2012
16		Yang Xu, Hu He, Zhizhong Tang: Energy Consumption Optimized Scheduling Algorithm for Clustered VLIW Architectures. J. Low Power Electronics 8(2): 146-157 (2012)
	2011
15		Jianfeng Zhu, Dong Wu, Yaru Yan, Xiao Yu, Hu He, Liyang Pan: A chip-level path-delay-distribution based Dual-VDD method for low power FPGA (abstract only). FPGA 2011: 281
14		Jianfeng Zhu, Hu He, Dong Wu, Liyang Pan: A cost-efficient self-configurable BIST technique for testing multiplexer-based FPGA interconnect. J. Electronic Testing 27(5): 647-655 (2011)
13		Jianfeng Zhu, Hu He, Dong Wu, Liyang Pan: Erratum to: A Cost-Efficient Self-Configurable BIST Technique for Testing Multiplexer-Based FPGA Interconnect. J. Electronic Testing 27(5): 679 (2011)
	2009
12		Zheng Shen, Hu He, Yihe Sun: Simultaneous Multithreading VLIW DSP Architecture with Dynamic Dispatch Mechanism. DSD 2009: 505-512
11		Yang Xu, Hu He, Yihe Sun: A Novel Low Energy Scheduling Algorithm for Clustered Very Long Instruction Word Architectures. J. Low Power Electronics 5(2): 123-134 (2009)
	2008
10		Adriel Cheng, Cheng-Chew Lim, Yihe Sun, Hu He, Zhixiong Zhou, Ting Lei: Using Genetic Evolutionary Software Application Testing to Verify a DSP SoC. DELTA 2008: 20-25
	2007
9		Zhixiong Zhou, Hu He, Yanjun Zhang, Yihe Sun, Adriel Cheng: A 2-Dimension Force-Directed Scheduling Algorithm for Register-File-Connectivity Clustered VLIW Architecture. ASAP 2007: 371-376
8		Yang Xu, Hu He, Zhou Zhixiong, Yanjun Zhang, Yihe Sun: Heuristic on a Novel Power Management System Cooperating with Compiler. J. Low Power Electronics 3(1): 22-27 (2007)
7		Zheng Shen, Hu He, Yanjun Zhang, Yihe Sun: A Video Specific Instruction Set Architecture for ASIP design. VLSI Design 2007: (2007)
	2006
6		Zheng Shen, Hu He, Yanjun Zhang, Yihe Sun: VS-ISA: A Video Specific Instruction Set Architecture for ASIP Design. IIH-MSP 2006: 587-592
5		Hu He, Lisimachos P. Kondi: An image super-resolution algorithm for different error levels per frame. IEEE Transactions on Image Processing 15(3): 592-603 (2006)
	2005
4		Yanjun Zhang, Hu He, Yihe Sun: A new register file access architecture for software pipelining in VLIW processors. ASP-DAC 2005: 627-630
3		Hu He, Lisimachos P. Kondi: A regularization framework for joint blur estimation and super-resolution of video sequences. ICIP (3) 2005: 329-332
	2004
2		Hu He, Lisimachos P. Kondi: Resolution enhancement of video sequences with simultaneous estimation of the regularization parameter. J. Electronic Imaging 13(3): 586-596 (2004)
	2003
1		Hu He, Lisimachos P. Kondi: MAP based resolution enhancement of video sequences using a Huber-Markov random field image prior model. ICIP (2) 2003: 933-936

Coauthor Index

1	Adriel Cheng	[9] [10]
2	Lisimachos P. Kondi	[1] [2] [3] [5]
3	Ting Lei	[10]
4	Cheng-Chew Lim	[10]
5	Liyang Pan	[13] [14] [15]
6	Zheng Shen	[6] [7] [12]
7	Yihe Sun	[4] [6] [7] [8] [9] [10] [11] [12]
8	Zhizhong Tang	[16]
9	Dong Wu	[13] [14] [15]
10	Yang Xu	[8] [11] [16]
11	Yaru Yan	[15]
12	Xiao Yu	[15]
13	Yanjun Zhang	[4] [6] [7] [8] [9]
14	Zhou Zhixiong	[8]
15	Zhixiong Zhou	[9] [10]
16	Jianfeng Zhu	[13] [14] [15]

Colors in the list of coauthors

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