Gautam Hazari

	2011
4		Gautam Hazari, H. Narayanan: On the Use of Simple Electrical Circuit Techniques for Performance Modeling and Optimization in VLSI Systems. IEEE Trans. VLSI Syst. 19(10): 1861-1873 (2011)
	2010
3		Gautam Hazari, Madhav P. Desai, G. Srinivas: Bottleneck Identification Techniques Leading to Simplified Performance Models for Efficient Design Space Exploration in VLSI Memory Systems. VLSI Design 2010: 15-20
	2007
2		Gautam Hazari, Madhav P. Desai, H. Kasture: On the Impact of Address Space Assignment on Performance in Systems-on-Chip. VLSI Design 2007: 540-545
	2004
1		Gautam Hazari, Madhav P. Desai, A. Gupta, S. Chakraborty: A Novel Technique Towards Eliminating the Global Clock in VLSI Circuits. VLSI Design 2004: 565-570

Coauthor Index

1	S. Chakraborty	[1]
2	Madhav P. Desai	[1] [2] [3]
3	A. Gupta	[1]
4	H. Kasture	[2]
5	H. Narayanan	[4]
6	G. Srinivas	[3]

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