Isamu Hayashi

	2012
3		Takeshi Matsubara, Isamu Hayashi, Abul Hasan Johari, Tadahiro Kuroda, Hiroki Ishikuro: A 0.7V 4.1mW 850Mbps/ch inductive-coupling transceiver with adaptive pulse width controller in 65nm CMOS. RWS 2012: 71-74
	2007
2		Fukashi Morishita, Hideyuki Noda, Isamu Hayashi, Takayuki Gyohten, Mako Okamoto, Takashi Ipposhi, Shigeto Maegawa, Katsumi Dosaka, Kazutami Arimoto: A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI. IEICE Transactions 90-C(4): 765-771 (2007)
	2006
1		Takayuki Gyohten, Fukashi Morishita, Isamu Hayashi, Mako Okamoto, Hideyuki Noda, Katsumi Dosaka, Kazutami Arimoto, Yasutaka Horiba: An On-Chip Supply-Voltage Control System Considering PVT Variations for Worst-Caseless Lower Voltage SoC Design. IEICE Transactions 89-C(11): 1519-1525 (2006)

Coauthor Index

1	Kazutami Arimoto	[1] [2]
2	Katsumi Dosaka	[1] [2]
3	Takayuki Gyohten	[1] [2]
4	Yasutaka Horiba	[1]
5	Takashi Ipposhi	[2]
6	Hiroki Ishikuro	[3]
7	Abul Hasan Johari	[3]
8	Tadahiro Kuroda	[3]
9	Shigeto Maegawa	[2]
10	Takeshi Matsubara	[3]
11	Fukashi Morishita	[1] [2]
12	Hideyuki Noda	[1] [2]
13	Mako Okamoto	[1] [2]

Colors in the list of coauthors

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page