Tomoaki Hasegawa

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2006

3 Haque Mohammad Munirul, Tomoaki Hasegawa, Michitaka Kameyama: Evaluation of Multiple-Valued Packet Multiplexing Scheme for Network-on-Chip Architecture. ISMVL 2006: 6

2005

2 Tomoaki Hasegawa, Yuya Homma, Michitaka Kameyama: Multiple-Valued VLSI Architecture for Intra-Chip Packet Data Transfer. ISMVL 2005: 114-119

1 Haque Mohammad Munirul, Tomoaki Hasegawa, Michitaka Kameyama: Implementation and Evaluation of a Fine-Grain Multiple-Valued Field Programmable VLSI Based on Source-Coupled Logic. ISMVL 2005: 120-125

	2006
3		Haque Mohammad Munirul, Tomoaki Hasegawa, Michitaka Kameyama: Evaluation of Multiple-Valued Packet Multiplexing Scheme for Network-on-Chip Architecture. ISMVL 2006: 6
	2005
2		Tomoaki Hasegawa, Yuya Homma, Michitaka Kameyama: Multiple-Valued VLSI Architecture for Intra-Chip Packet Data Transfer. ISMVL 2005: 114-119
1		Haque Mohammad Munirul, Tomoaki Hasegawa, Michitaka Kameyama: Implementation and Evaluation of a Fine-Grain Multiple-Valued Field Programmable VLSI Based on Source-Coupled Logic. ISMVL 2005: 120-125

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