![]() | ![]() |
| 2006 | ||
|---|---|---|
| 2 | Dac Pham, Hans-Werner Anderson, Erwin Behnen, Mark Bolliger, Sanjay Gupta, H. Peter Hofstee, Paul E. Harvey, Charles R. Johns, James A. Kahle, Atsushi Kameyama, John M. Keaty, Bob Le, Sang Lee, Tuyen V. Nguyen, John G. Petrovick, Mydung Pham, Juergen Pille, Stephen D. Posluszny, Mack W. Riley, Joseph Verock, James D. Warnock, Steve Weitzel, Dieter F. Wendel: Key features of the design methodology enabling a multi-core SoC implementation of a first-generation CELL processor. ASP-DAC 2006: 871-878 | |
| 1994 | ||
| 1 | Troy N. Hicks, Richard E. Fry, Paul E. Harvey: POWER2 floating-point unit: Architecture and implementation. IBM Journal of Research and Development 38(5): 525-536 (1994) | |
| 1 | Hans-Werner Anderson | [2] |
| 2 | Erwin Behnen | [2] |
| 3 | Mark Bolliger | [2] |
| 4 | Richard E. Fry | [1] |
| 5 | Sanjay Gupta | [2] |
| 6 | Troy N. Hicks | [1] |
| 7 | H. Peter Hofstee | [2] |
| 8 | Charles R. Johns | [2] |
| 9 | James A. Kahle | [2] |
| 10 | Atsushi Kameyama | [2] |
| 11 | John M. Keaty | [2] |
| 12 | Bob Le | [2] |
| 13 | Sang Lee | [2] |
| 14 | Tuyen V. Nguyen | [2] |
| 15 | John G. Petrovick | [2] |
| 16 | Dac Pham | [2] |
| 17 | Mydung Pham | [2] |
| 18 | Juergen Pille (Jürgen Pille) | [2] |
| 19 | Stephen D. Posluszny | [2] |
| 20 | Mack W. Riley | [2] |
| 21 | Joseph Verock | [2] |
| 22 | James D. Warnock | [2] |
| 23 | Steve Weitzel | [2] |
| 24 | Dieter F. Wendel | [2] |
Colors in the list of coauthors
Last update Thu May 31 18:55:10 2012 CET by the DBLP Team —
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