dblp.uni-trier.dewww.dagstuhl.dewww.uni-trier.de

Siva Kumar Sastry Hari Coauthor index pubzone.org

List of publications from the DBLP Bibliography Server - FAQ
Ask others: ACM DL/Guide - CiteSeerX - CSB - MetaPress - Google - Bing - Yahoo

DBLP keys2012
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSiva Kumar Sastry Hari, Sarita V. Adve, Helia Naeimi, Pradeep Ramachandran: Relyzer: exploiting application-level fault equivalence to analyze application resiliency to transient faults. ASPLOS 2012: 123-134
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAndrea Pellegrini, Robert Smolinski, Lei Chen, Xin Fu, Siva Kumar Sastry Hari, Junhao Jiang, Sarita V. Adve, Todd M. Austin, Valeria Bertacco: CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions. DATE 2012: 1106-1109
2011
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDimitris Gizopoulos, Mihalis Psarakis, Sarita V. Adve, Pradeep Ramachandran, Siva Kumar Sastry Hari, Daniel J. Sorin, Albert Meixner, A. Biswas, Xavier Vera: Architectures for online error detection and recovery in multicore processors. DATE 2011: 533-538
2009
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLMan-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu, Siva Kumar Sastry Hari, Sarita V. Adve: Accurate microarchitecture-level fault modeling for studying hardware faults. HPCA 2009: 105-116
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSiva Kumar Sastry Hari, Man-Lap Li, Pradeep Ramachandran, Byn Choi, Sarita V. Adve: mSWAT: low-cost hardware fault detection and diagnosis for multicore systems. MICRO 2009: 122-132
2008
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSiva Kumar Sastry Hari, Vishnu Vardhan Reddy Konda, V. Kamakoti, Vivekananda M. Vedula, K. S. Maneperambil: Automatic Constraint Based Test Generation for Behavioral HDL Models. IEEE Trans. VLSI Syst. 16(4): 408-421 (2008)
2007
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLK. Najeeb, Vishnu Vardhan Reddy Konda, Siva Kumar Sastry Hari, V. Kamakoti, Vivekananda M. Vedula: Power Virus Generation Using Behavioral Models of Circuits. VTS 2007: 35-42

Coauthor Index

1Sarita V. Adve [3] [4] [5] [6] [7]
2Todd M. Austin [6]
3Valeria Bertacco [6]
4A. Biswas [5]
5Lei Chen [6]
6Byn Choi [3]
7Xin Fu [6]
8Dimitris Gizopoulos [5]
9Junhao Jiang [6]
10V. Kamakoti [1] [2]
11Ulya R. Karpuzcu [4]
12Vishnu Vardhan Reddy Konda [1] [2]
13Man-Lap Li [3] [4]
14K. S. Maneperambil [2]
15Albert Meixner [5]
16Helia Naeimi [7]
17K. Najeeb [1]
18Andrea Pellegrini [6]
19Mihalis Psarakis [5]
20Pradeep Ramachandran [3] [4] [5] [7]
21Robert Smolinski [6]
22Daniel J. Sorin [5]
23Vivekananda M. Vedula [1] [2]
24Xavier Vera [5]

Colors in the list of coauthors

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page