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| 2012 | ||
|---|---|---|
| 3 | Tadaaki Yamauchi, Satoru Hanzawa: Session 25 overview: Non-volatile memory solutions: Memory subcommittee. ISSCC 2012: 420-421 | |
| 2011 | ||
| 2 | Satoru Hanzawa, Takahiro Hanyu: Design of an 8-nsec 72-bit-Parallel-Search Content-Addressable Memory Using a Phase-Change Device. IEICE Transactions 94-C(8): 1302-1310 (2011) | |
| 2007 | ||
| 1 | Riichiro Takemura, Kiyoo Itoh, Tomonori Sekiguchi, Satoru Akiyama, Satoru Hanzawa, Kazuhiko Kajigaya, Takayuki Kawahara: Long-Retention-Time, High-Speed DRAM Array with 12-F2 Twin Cell for Sub 1-V Operation. IEICE Transactions 90-C(4): 758-764 (2007) | |
| 1 | Satoru Akiyama | [1] |
| 2 | Takahiro Hanyu | [2] |
| 3 | Kiyoo Itoh | [1] |
| 4 | Kazuhiko Kajigaya | [1] |
| 5 | Takayuki Kawahara | [1] |
| 6 | Tomonori Sekiguchi | [1] |
| 7 | Riichiro Takemura | [1] |
| 8 | Tadaaki Yamauchi | [3] |
Colors in the list of coauthors
Last update Thu May 31 18:55:10 2012 CET by the DBLP Team —
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