Pavan Kumar Hanumolu

	2012
42		Karthikeyan Reddy, Sachin Rao, Rajesh Inti, Brian Young, Amr Elshazly, Mrunmay Talegaonkar, Pavan Kumar Hanumolu: A 16mW 78dB-SNDR 10MHz-BW CT-ΔΣ ADC using residue-cancelling VCO-based quantizer. ISSCC 2012: 152-154
41		Amr Elshazly, Rajesh Inti, Brian Young, Pavan Kumar Hanumolu: A 1.5GHz 890μW digital MDLL with 400fsrms integrated jitter, -55.6dBc reference spur and 20fs/mV supply-noise sensitivity using 1b TDC. ISSCC 2012: 242-244
40		Brian Drost, Mrunmay Talegaonkar, Pavan Kumar Hanumolu: A 0.55V 61dB-SNR 67dB-SFDR 7MHz 4th-order Butterworth filter using ring-oscillator-based integrators in 90nm CMOS. ISSCC 2012: 360-362
39		Amr Elshazly, Sachin Rao, Brian Young, Pavan Kumar Hanumolu: A 13b 315fsrms 2mW 500MS/s 1MHz bandwidth highly digital time-to-digital converter using switched ring oscillators. ISSCC 2012: 464-466
38		Pavan Kumar Hanumolu, Un-Ku Moon, Terri S. Fiez: Tutorial T5: Advanced Analog-Mixed Signal System and Circuit Techniques. VLSI Design 2012: 20-21
	2011
37		Samira Zali Asl, Saurabh Saxena, Pavan Kumar Hanumolu, Kartikeya Mayaram, Terri S. Fiez: A 77dB SNDR, 4MHz MASH ΔΣ modulator with a second-stage multi-rate VCO-based quantizer. CICC 2011: 1-4
36		Sanghyeon Lee, Jeongseok Chae, Mitsuru Aniya, Seiji Takeuchi, Koichi Hamashita, Pavan Kumar Hanumolu, Gabor C. Temes: A double-sampled low-distortion cascade ΔΣ modulator with an adder/integrator for WLAN application. CICC 2011: 1-4
35		Bangda Yang, Brian Drost, Sachin Rao, Pavan Kumar Hanumolu: A high-PSR LDO using a feedforward supply-noise cancellation technique. CICC 2011: 1-4
34		Ankur Agrawal, Pavan Kumar Hanumolu, Gu-Yeon Wei: Area efficient phase calibration of a 1.6 GHz multiphase DLL. CICC 2011: 1-4
33		Mrunmay Talegaonkar, Rajesh Inti, Pavan Kumar Hanumolu: Digital clock and data recovery circuit design: Challenges and tradeoffs. CICC 2011: 1-8
32		Qadeer Khan, Sachin Rao, Damian Swank, Arun Rao, William McIntyre, Sarvesh Bang, Pavan Kumar Hanumolu: A 3.3V 500mA digital Buck-Boost converter with 92% peak efficiency using constant ON/OFF time delta-sigma fractional-N control. ESSCIRC 2011: 439-442
31		Rajesh Inti, Amr Elshazly, Brian Young, Wenjing Yin, Marcel A. Kossel, Thomas Toifl, Pavan Kumar Hanumolu: A highly digital 0.5-to-4Gb/s 1.9mW/Gb/s serial-link transceiver using current-recycling in 90nm CMOS. ISSCC 2011: 152-154
30		Sachin Rao, Qadeer Khan, Sarvesh Bang, Damian Swank, Arun Rao, William McIntyre, Pavan Kumar Hanumolu: A 1.2A buck-boost LED driver with 13% efficiency improvement using error-averaged SenseFET-based current sensing. ISSCC 2011: 238-240
29		Rajesh Inti, Wenjing Yin, Amr Elshazly, Naga Sasidhar, Pavan Kumar Hanumolu: A 0.5-to-2.5Gb/s reference-less half-rate digital CDR with unlimited frequency acquisition range and improved input duty-cycle error tolerance. ISSCC 2011: 438-450
28		Wenjing Yin, Rajesh Inti, Amr Elshazly, Pavan Kumar Hanumolu: A TDC-less 7mW 2.5Gb/s digital CDR with linear loop dynamics and offset-free data recovery. ISSCC 2011: 440-442
27		Amr Elshazly, Rajesh Inti, Wenjing Yin, Brian Young, Pavan Kumar Hanumolu: A 0.4-to-3GHz digital PLL with supply-noise cancellation using deterministic background calibration. ISSCC 2011: 92-94
26		Igor Vytyaz, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram: Design-Oriented Analysis of Circuits With Equality Constraints. IEEE Trans. on Circuits and Systems 58-I(5): 1089-1098 (2011)
25		Yan Wang, Pavan Kumar Hanumolu, Gabor C. Temes: Design Techniques for Wideband Discrete-Time Delta-Sigma ADCs With Extra Loop Delay. IEEE Trans. on Circuits and Systems 58-I(7): 1518-1530 (2011)
24		Amr Elshazly, Rajesh Inti, Wenjing Yin, Brian Young, Pavan Kumar Hanumolu: A 0.4-to-3 GHz Digital PLL With PVT Insensitive Supply Noise Cancellation Using Deterministic Background Calibration. J. Solid-State Circuits 46(12): 2759-2771 (2011)
23		Sachin Rao, Qadeer Khan, Sarvesh Bang, Damian Swank, Arun Rao, William McIntyre, Pavan Kumar Hanumolu: A 1.2-A Buck-Boost LED Driver With On-Chip Error Averaged SenseFET-Based Current Sensing Technique. J. Solid-State Circuits 46(12): 2772-2783 (2011)
22		Rajesh Inti, Wenjing Yin, Amr Elshazly, Naga Sasidhar, Pavan Kumar Hanumolu: A 0.5-to-2.5 Gb/s Reference-Less Half-Rate Digital CDR With Unlimited Frequency Acquisition Range and Improved Input Duty-Cycle Error Tolerance. J. Solid-State Circuits 46(12): 3150-3162 (2011)
21		Wenjing Yin, Rajesh Inti, Amr Elshazly, Mrunmay Talegaonkar, Brian Young, Pavan Kumar Hanumolu: A TDC-Less 7 mW 2.5 Gb/s Digital CDR With Linear Loop Dynamics and Offset-Free Data Recovery. J. Solid-State Circuits 46(12): 3163-3173 (2011)
20		Wenjing Yin, Rajesh Inti, Amr Elshazly, Brian Young, Pavan Kumar Hanumolu: A 0.7-to-3.5 GHz 0.6-to-2.8 mW Highly Digital Phase-Locked Loop With Bandwidth Tracking. J. Solid-State Circuits 46(8): 1870-1880 (2011)
	2010
19		Sarvesh Bang, Damian Swank, Arun Rao, William McIntyre, Qadeer Khan, Pavan Kumar Hanumolu: A 1.2A 2MHz tri-mode Buck-Boost LED driver with feed-forward duty cycle correction. CICC 2010: 1-4
18		Wenjing Yin, Rajesh Inti, Pavan Kumar Hanumolu: A 1.6mW 1.6ps-rms-jitter 2.5GHz digital PLL with 0.7-to-3.5GHz frequency range in 90nm CMOS. CICC 2010: 1-4
17		Brian Young, Sunwoo Kwon, Amr Elshazly, Pavan Kumar Hanumolu: A 2.4ps resolution 2.1mW second-order noise-shaped time-to-digital converter with 3.2ns range in 1MHz bandwidth. CICC 2010: 1-4
16		Jeongseok Chae, Sanghyeon Lee, Mitsuru Aniya, Seiji Takeuchi, Koichi Hamashita, Pavan Kumar Hanumolu, Gabor C. Temes: A 63 dB 16 mW 20 MHz BW double-sampled ΔΣs analog-to-digital converter with an embedded-adder quantizer. CICC 2010: 1-4
15		Abhijith Arakali, Srikanth Gondi, Pavan Kumar Hanumolu: Analysis and Design Techniques for Supply-Noise Mitigation in Phase-Locked Loops. IEEE Trans. on Circuits and Systems 57-I(11): 2880-2889 (2010)
14		David Gubbins, Bumha Lee, Pavan Kumar Hanumolu, Un-Ku Moon: Continuous-Time Input Pipeline ADCs. J. Solid-State Circuits 45(8): 1456-1468 (2010)
	2009
13		Sunwoo Kwon, Pavan Kumar Hanumolu, Sang-Ho Kim, Sung-No Lee, Seung-Bin You, Ho-Jin Park, Jae-Whui Kim, Un-Ku Moon: An 11mW 100MHz 16X-OSR 64dB-SNDR hybrid CT/DT ΔΣ ADC with relaxed DEM timing. CICC 2009: 171-174
12		David Gubbins, Sunwoo Kwon, Bumha Lee, Pavan Kumar Hanumolu, Un-Ku Moon: A continuous-time input pipeline ADC with inherent anti-alias filtering. CICC 2009: 275-278
11		Pavan Kumar Hanumolu, Alessandro Piovaccari: Over-sampled data converters. CICC 2009
10		Skyler Weaver, Benjamin P. Hershberg, Pavan Kumar Hanumolu, Un-Ku Moon: A multiplexer-based digital passive linear counter (PLINCO). ICECS 2009: 607-610
9		Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram: Automated Design and Optimization of Low-Noise Oscillators. IEEE Trans. on CAD of Integrated Circuits and Systems 28(5): 609-622 (2009)
8		Volodymyr Kratyuk, Pavan Kumar Hanumolu, Kerem Ok, Un-Ku Moon, Kartikeya Mayaram: A Digital PLL With a Stochastic Time-to-Digital Converter. IEEE Trans. on Circuits and Systems 56-I(8): 1612-1621 (2009)
	2008
7		Igor Vytyaz, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram: Periodic Steady-State Analysis Augmented with Design Equality Constraints. DATE 2008: 312-317
6		Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram: Sensitivity Analysis for Oscillators. IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1521-1534 (2008)
	2007
5		Igor Vytyaz, David C. Lee, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram: Sensitivity analysis for oscillators. ICCAD 2007: 458-463
	2006
4		N. Talebbeydokhti, Pavan Kumar Hanumolu, Peter Kurahashi, Un-Ku Moon: Constant transconductance bias circuit with an on-chip resistor. ISCAS 2006
	2005
3		Volodymyr Kratyuk, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram: A low spur fractional-N frequency synthesizer architecture. ISCAS (3) 2005: 2807-2810
2		Ting Wu, Pavan Kumar Hanumolu, Un-Ku Moon, Kartikeya Mayaram: An FMDLL based dual-loop frequency synthesizer for 5 GHz WLAN applications. ISCAS (4) 2005: 3986-3989
	2004
1		Pavan Kumar Hanumolu, Bryan Casper, Randy Mooney, Gu-Yeon Wei, Un-Ku Moon: Jitter in high-speed serial and parallel links. ISCAS (4) 2004: 425-428

Coauthor Index

1	Ankur Agrawal	[34]
2	Mitsuru Aniya	[16] [36]
3	Abhijith Arakali	[15]
4	Samira Zali Asl	[37]
5	Sarvesh Bang	[19] [23] [30] [32]
6	Bryan Casper	[1]
7	Jeongseok Chae	[16] [36]
8	Brian Drost	[35] [40]
9	Amr Elshazly	[17] [20] [21] [22] [24] [27] [28] [29] [31] [39] [41] [42]
10	Terri S. Fiez	[37] [38]
11	Srikanth Gondi	[15]
12	David Gubbins	[12] [14]
13	Koichi Hamashita	[16] [36]
14	Benjamin P. Hershberg	[10]
15	Rajesh Inti	[18] [20] [21] [22] [24] [27] [28] [29] [31] [33] [41] [42]
16	Qadeer Khan	[19] [23] [30] [32]
17	Jae-Whui Kim	[13]
18	Sang-Ho Kim	[13]
19	Marcel A. Kossel	[31]
20	Volodymyr Kratyuk	[3] [8]
21	Peter Kurahashi	[4]
22	Sunwoo Kwon	[12] [13] [17]
23	Bumha Lee	[12] [14]
24	David C. Lee	[5] [6] [9]
25	Sanghyeon Lee	[16] [36]
26	Sung-No Lee	[13]
27	Kartikeya Mayaram	[2] [3] [5] [6] [7] [8] [9] [26] [37]
28	William McIntyre	[19] [23] [30] [32]
29	Un-Ku Moon	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [12] [13] [14] [26] [38]
30	Randy Mooney	[1]
31	Kerem Ok	[8]
32	Ho-Jin Park	[13]
33	Alessandro Piovaccari	[11]
34	Arun Rao	[19] [23] [30] [32]
35	Sachin Rao	[23] [30] [32] [35] [39] [42]
36	Karthikeyan Reddy	[42]
37	Naga Sasidhar	[22] [29]
38	Saurabh Saxena	[37]
39	Damian Swank	[19] [23] [30] [32]
40	Seiji Takeuchi	[16] [36]
41	N. Talebbeydokhti	[4]
42	Mrunmay Talegaonkar	[21] [33] [40] [42]
43	Gabor C. Temes	[16] [25] [36]
44	Thomas Toifl	[31]
45	Igor Vytyaz	[5] [6] [7] [9] [26]
46	Yan Wang	[25]
47	Skyler Weaver	[10]
48	Gu-Yeon Wei	[1] [34]
49	Ting Wu	[2]
50	Bangda Yang	[35]
51	Wenjing Yin	[18] [20] [21] [22] [24] [27] [28] [29] [31]
52	Seung-Bin You	[13]
53	Brian Young	[17] [20] [21] [24] [27] [31] [39] [41] [42]

Colors in the list of coauthors

Last update Thu May 31 18:55:10 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page