 | 2009 |
|---|
| 7 |       | Sang-Il Han,
Soo-Ik Chae,
Lisane B. de Brisolara,
Luigi Carro,
Katalin Popovici,
Xavier Guerin,
Ahmed Amine Jerraya,
Kai Huang,
Lei Li,
Xiaolang Yan:
Simulink®-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation.
Integration 42(2): 227-245 (2009) |
| 2007 |
|---|
| 6 | | Kai Huang,
Sang-Il Han,
Katalin Popovici,
Lisane B. de Brisolara,
Xavier Guerin,
Lei Li,
Xiaolang Yan,
Soo-Ik Chae,
Luigi Carro,
Ahmed Amine Jerraya:
Simulink-Based MPSoC Design Flow: Case Study of Motion-JPEG and H.264.
DAC 2007: 39-42 |
| 5 | | Lisane B. de Brisolara,
Sang-Il Han,
Xavier Guerin,
Luigi Carro,
Ricardo Reis,
Soo-Ik Chae,
Ahmed Amine Jerraya:
Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC.
SCOPES 2007: 81-89 |
| 4 | | Sang-Il Han,
Soo-Ik Chae,
Lisane B. de Brisolara,
Luigi Carro,
Ricardo Reis,
Xavier Guerin,
Ahmed Amine Jerraya:
Memory-efficient multithreaded code generation from Simulink for heterogeneous MPSoC.
Design Autom. for Emb. Sys. 11(4): 249-283 (2007) |
| 2006 |
|---|
| 3 | | Sang-Il Han,
Soo-Ik Chae,
Ahmed Amine Jerraya:
Functional modeling techniques for efficient SW code generation of video codec applications.
ASP-DAC 2006: 935-940 |
| 2 | | Sang-Il Han,
Xavier Guerin,
Soo-Ik Chae,
Ahmed Amine Jerraya:
Buffer memory optimization for video codec application modeled in Simulink.
DAC 2006: 689-694 |
| 2004 |
|---|
| 1 | | Sang-Il Han,
Amer Baghdadi,
Marius Bonaciu,
Soo-Ik Chae,
Ahmed Amine Jerraya:
An efficient scalable and flexible data transfer architecture for multiprocessor SoC with massive distributed memory.
DAC 2004: 250-255 |
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