Ilker Hamzaoglu

	2012
34		Merve Peyic, Hakan Baba, Erdem Guleyuboglu, Ilker Hamzaoglu, Mehmet Keskinoz: A low power multi-rate decoder hardware for IEEE 802.11n LDPC codes. Microprocessors and Microsystems - Embedded Hardware Design 36(3): 159-166 (2012)
33		Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu: Computation and power reduction techniques for H.264 intra prediction. Microprocessors and Microsystems - Embedded Hardware Design 36(3): 205-214 (2012)
	2011
32		Caglar Kalaycioglu, Ilker Hamzaoglu: Dynamic Power Estimation for Motion Estimation Hardware. DSD 2011: 279-282
31		Tevfik Zafer Ozcan, Cagla Cakir, Mert Cetin, Ilker Hamzaoglu: An Overlapped Block Motion Compensation Hardware for Frame Rate Conversion. DSD 2011: 309-315
30		Abdulkadir Akin, Onur Can Ulusel, Tevfik Zafer Ozcan, Gokhan Sayilar, Ilker Hamzaoglu: A Novel Power Reduction Technique for Block Matching Motion Estimation Hardware. FPL 2011: 269-272
29		Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu: A novel energy reduction technique for H.264 intra mode decision. ICIP 2011: 385-388
	2010
28		Abdulkadir Akin, Gokhan Sayilar, Ilker Hamzaoglu: A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation. DATE 2010: 393-398
27		Ozgur Tasdizen, Ilker Hamzaoglu: Computation Reduction Techniques for Vector Median Filtering and their Hardware Implementation. DSD 2010: 731-736
26		Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu: A Computation and Power Reduction Technique for H.264 Intra Prediction. DSD 2010: 753-760
25		Yusuf Adibelli, Mustafa Parlak, Ilker Hamzaoglu: Pixel Similarity Based Computation and Power Reduction Technique for H.264 Intra Prediction. FPL 2010: 171-174
24		Ozgur Tasdizen, Ilker Hamzaoglu: Recursive Dynamically Variable Step Search Motion Estimation Algorithm for High Definition Video. ICPR 2010: 2354-2357
23		Mert Cetin, Ilker Hamzaoglu: An Adaptive True Motion Estimation Algorithm for Frame Rate Conversion of High Definition Video. ICPR 2010: 4109-4112
22		Abdulkadir Akin, Mert Cetin, Burak Erbagci, Ozgur Karakaya, Ilker Hamzaoglu: An adaptive bilateral motion estimation algorithm and its hardware architecture. VLSI-SoC 2010: 207-212
	2009
21		Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilker Hamzaoglu: A high performance reconfigurable Motion Estimation hardware architecture. DATE 2009: 882-885
20		Abdulkadir Akin, Yigit Dogan, Ilker Hamzaoglu: A High Performance Hardware Architecture for One Bit Transform Based Motion Estimation. DSD 2009: 691-698
19		Ozgur Tasdizen, Ilker Hamzaoglu: A Reconfigurable Frame Interpolation Hardware Architecture for High Definition Video. DSD 2009: 714-719
18		Caglar Kalaycioglu, Onur Can Ulusel, Ilker Hamzaoglu: Low power techniques for Motion Estimation hardware. FPL 2009: 180-185
	2007
17		Mustafa Parlak, Ilker Hamzaoglu: A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm. AHS 2007: 127-133
16		Esra Sahin, Ilker Hamzaoglu: Interactive presentation: An efficient hardware architecture for H.264 intra prediction algorithm. DATE 2007: 183-188
15		Serkan Oktem, Ilker Hamzaoglu: An Efficient Hardware Architecture for Quarter-Pixel Accurate H.264 Motion Estimation. DSD 2007: 444-447
14		Esra Sahin, Ilker Hamzaoglu: An Efficient Intra Prediction Hardware Architecture for H.264 Video Decoding. DSD 2007: 448-454
13		Ilker Hamzaoglu, Ozgur Tasdizen, Esra Sahin: An efficient H.264 intra frame coder system design. VLSI-SoC 2007: 200-205
	2006
12		Mustafa Parlak, Ilker Hamzaoglu: An Efficient Hardware Architecture for H.264 Adaptive Deblocking Filter. AHS 2006: 381-385
11		Sinan Yalcin, Ilker Hamzaoglu: A High Performance Hardware Architecture for Half-Pixel Accurate H.264 Motion Estimation. VLSI-SoC 2006: 63-67
	2005
10		Sinan Yalcin, Hasan F. Ates, Ilker Hamzaoglu: A High Performance Hardware Architecture for an SAD Reuse based Hierarchical Motion Estimation Algorithm for H.264 Video Coding. FPL 2005: 509-514
	2000
9		Ilker Hamzaoglu, Janak H. Patel: Deterministic Test Pattern Generation Techniques for Sequential Circuits. ICCAD 2000: 538-543
8		Ilker Hamzaoglu, Janak H. Patel: Reducing Test Application Time for Built-in-Self-Test Test Pattern Generators. VTS 2000: 369-376
7		Ilker Hamzaoglu, Janak H. Patel: Test set compaction algorithms for combinational circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 957-963 (2000)
	1999
6		Ilker Hamzaoglu, Janak H. Patel: Reducing Test Application Time for Full Scan Embedded Cores. FTCS 1999: 260-267
5		Ilker Hamzaoglu, Janak H. Patel: New Techniques for Deterministic Test Pattern Generation. J. Electronic Testing 15(1-2): 63-73 (1999)
	1998
4		Ilker Hamzaoglu, Janak H. Patel: Test set compaction algorithms for combinational circuits. ICCAD 1998: 283-289
3		Ilker Hamzaoglu, Janak H. Patel: Compact two-pattern test set generation for combinational and full scan circuits. ITC 1998: 944-953
2		Ilker Hamzaoglu, Janak H. Patel: New Techniques for Deterministic Test Pattern Generation. VTS 1998: 446-452
	1997
1		Hillol Kargupta, Ilker Hamzaoglu, Brian Stafford: Scalable, Distributed Data Mining - An Agent Architecture. KDD 1997: 211-214

Coauthor Index

1	Yusuf Adibelli	[25] [26] [29] [33]
2	Abdulkadir Akin	[20] [21] [22] [28] [30]
3	Hasan F. Ates	[10]
4	Hakan Baba	[34]
5	Cagla Cakir	[31]
6	Mert Cetin	[22] [23] [31]
7	Yigit Dogan	[20]
8	Burak Erbagci	[22]
9	Erdem Guleyuboglu	[34]
10	Caglar Kalaycioglu	[18] [32]
11	Ozgur Karakaya	[22]
12	Hillol Kargupta	[1]
13	Mehmet Keskinoz	[34]
14	Halil Kukner	[21]
15	Serkan Oktem	[15]
16	Tevfik Zafer Ozcan	[30] [31]
17	Mustafa Parlak	[12] [17] [25] [26] [29] [33]
18	Janak H. Patel	[2] [3] [4] [5] [6] [7] [8] [9]
19	Merve Peyic	[34]
20	Esra Sahin	[13] [14] [16]
21	Gokhan Sayilar	[28] [30]
22	Brian Stafford	[1]
23	Ozgur Tasdizen	[13] [19] [21] [24] [27]
24	Onur Can Ulusel	[18] [30]
25	Sinan Yalcin	[10] [11]

Colors in the list of coauthors

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