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Peter Hallschmid Coauthor index pubzone.org

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DBLP keys2011
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLRehan Ahmed, Peter Hallschmid: Modeling and Evaluation of Dynamic Partial Reconfigurable Datapaths for FPGA-Based Systems Using Stochastic Networks. FPL 2011: 70-75
2008
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPeter Hallschmid, Resve Saleh: Fast Design Space Exploration Using Local Regression Modeling With Application to ASIPs. IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 508-515 (2008)
2007
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPeter Hallschmid, Resve Saleh: Automatic Cache Tuning for Energy-Efficiency using Local Regression Modeling. DAC 2007: 732-737
2006
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPeter Hallschmid, Resve Saleh: Fast Configuration of an Energy-Efficient Branch Predictor. ISVLSI 2006: 289-294
2005
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPeter Hallschmid, Steven J. E. Wilton: Routing architecture optimizations for high-density embedded programmable IP cores. IEEE Trans. VLSI Syst. 13(11): 1320-1324 (2005)
2001
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLPeter Hallschmid, Steven J. E. Wilton: Detailed routing architectures for embedded programmable logic IP cores. FPGA 2001: 69-74

Coauthor Index

1Rehan Ahmed [6]
2Resve A. Saleh (Resve Saleh, Res Saleh) [3] [4] [5]
3Steven J. E. Wilton [1] [2]

Colors in the list of coauthors

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP TeamThis material is Open Data Data released under the ODC-BY 1.0 license — See also our legal information page