![]() | ![]() |
| 2011 | ||
|---|---|---|
| 2 | Young San Shin, Jae-Kyung Wee, Jong-Chan Ha, Ji-Hoon Lim, Yong-Ju Kim, Young-Sang Son: A Seamless-Controlled Digital PLL Using Dual Loops for High Speed SoCs. Journal of Circuits, Systems, and Computers 20(4): 741-756 (2011) | |
| 2007 | ||
| 1 | Ji-Hoon Lim, Jong-Chan Ha, Won-Young Jung, Yong-Ju Kim, Jae-Kyung Wee: A Novel High-Speed and Low-Voltage CMOS Level-Up/Down Shifter Design for Multiple-Power and Multiple-Clock Domain Chips. IEICE Transactions 90-C(3): 644-648 (2007) | |
| 1 | Won-Young Jung | [1] |
| 2 | Yong-Ju Kim | [1] [2] |
| 3 | Ji-Hoon Lim | [1] [2] |
| 4 | Young San Shin | [2] |
| 5 | Young-Sang Son | [2] |
| 6 | Jae-Kyung Wee | [1] [2] |
Data released under the ODC-BY 1.0 license — See also our legal information page