 | 2012 |
|---|
| 35 |       | Kwen-Siong Chong,
Kok-Leong Chang,
Bah-Hwee Gwee,
Joseph S. Chang:
Synchronous-Logic and Globally-Asynchronous-Locally-Synchronous (GALS) Acoustic Digital Signal Processors.
J. Solid-State Circuits 47(3): 769-780 (2012) |
| 2011 |
|---|
| 34 | | Weng-Geng Ho,
Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang,
Yin Sun,
Kok-Leong Chang:
Improved asynchronous-logic dual-rail Sense Amplifier-based Pass Transistor Logic with high speed and low power operation.
ISCAS 2011: 1936-1939 |
| 33 | | Junchao Chen,
Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A low-power dual-rail inputs write method for bit-interleaved memory cells.
ISCAS 2011: 325-328 |
| 32 | | Chong-Fatt Law,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
Modeling and Synthesis of Asynchronous Pipelines.
IEEE Trans. VLSI Syst. 19(4): 682-695 (2011) |
| 31 | | Yiqiong Shi,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
Asynchronous DSP for low-power energy-efficient embedded systems.
Microprocessors and Microsystems - Embedded Hardware Design 35(3): 318-328 (2011) |
| 2010 |
|---|
| 30 | | Yiqiong Shi,
Chan Wai Ting,
Bah-Hwee Gwee,
Ye Ren:
A highly efficient method for extracting FSMs from flattened gate-level netlist.
ISCAS 2010: 2610-2613 |
| 29 | | Victor Adrian,
Joseph S. Chang,
Bah-Hwee Gwee:
A Randomized Wrapped-Around Pulse Position Modulation Scheme for DC-DC Converters.
IEEE Trans. on Circuits and Systems 57-I(9): 2320-2333 (2010) |
| 2009 |
|---|
| 28 | | Kok-Leong Chang,
Bah-Hwee Gwee,
Yuanjin Zheng:
A Performance Comparison on Asynchronous Matched-delay Templates.
ISCAS 2009: 1008-1011 |
| 27 | | Tong Lin,
Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
Fine-grained Power Gating for Leakage and Short-circuit Power Reduction by using Asynchronous-logic.
ISCAS 2009: 3162-3165 |
| 26 | | Victor Adrian,
Joseph S. Chang,
Bah-Hwee Gwee:
A Low-Voltage Micropower Digital Class-D Amplifier Modulator for Hearing Aids.
IEEE Trans. on Circuits and Systems 56-I(2): 337-349 (2009) |
| 25 | | Bah-Hwee Gwee,
Joseph S. Chang,
Yiqiong Shi,
Chien-Chung Chua,
Kwen-Siong Chong:
A Low-Voltage Micropower Asynchronous Multiplier With Shift-Add Multiplication Approach.
IEEE Trans. on Circuits and Systems 56-I(7): 1349-1359 (2009) |
| 2008 |
|---|
| 24 | | Kok-Leong Chang,
Bah-Hwee Gwee,
Yuanjin Zheng:
A semi-custom memory design for an asynchronous 8051 microcontroller.
ISCAS 2008: 3398-3401 |
| 23 | | Kok-Leong Chang,
Yao Zhu,
Bah-Hwee Gwee:
De-synchronization of a point-of-sales digital-logic controller.
ISCAS 2008: 3402-3405 |
| 22 | | Chong-Fatt Law,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
Asynchronous Control Network Optimization Using Fast Minimum-Cycle-Time Analysis.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 985-998 (2008) |
| 2007 |
|---|
| 21 | | Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A Low Energy FFT/IFFT Processor for Hearing Aids.
ISCAS 2007: 1169-1172 |
| 20 | | Kok-Leong Chang,
Bah-Hwee Gwee,
Yuanjin Zheng:
An Asynchronous Dual-Rail Multiplier based on Energy-Efficient STFB Templates.
ISCAS 2007: 3267-3270 |
| 19 | | Kunal Mukherjee,
Bah-Hwee Gwee:
A 32-point FFT based Noise Reduction Algorithm for Single Channel Speech Signals.
ISCAS 2007: 3928-3931 |
| 18 | | Chong-Fatt Law,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
Fast and memory-efficient invariant computation of ordinary Petri nets.
IET Computers & Digital Techniques 1(5): 612-624 (2007) |
| 2006 |
|---|
| 17 | | Kok-Leong Chang,
Bah-Hwee Gwee:
A low-energy low-voltage asynchronous 8051 microcontroller core.
ISCAS 2006 |
| 16 | | Victor Adrian,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
An acoustic noise suppression system with reduced musical artifacts.
ISCAS 2006 |
| 2005 |
|---|
| 15 | | Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
Low-voltage micropower multipliers with reduced spurious switching.
ISCAS (4) 2005: 4078-4081 |
| 14 | | Victor Adrian,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A combined interpolatorless interpolation and high accuracy sampling process for digital class D amplifiers.
ISCAS (6) 2005: 5405-5408 |
| 13 | | Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A micropower low-voltage multiplier with reduced spurious switching.
IEEE Trans. VLSI Syst. 13(2): 255-265 (2005) |
| 12 | | Bah-Hwee Gwee,
Meng-Hiot Lim:
An evolution search algorithm for solving N-queen problems.
IJCAT 24(1): 43-48 (2005) |
| 2004 |
|---|
| 11 |  | Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A low power 16-bit Booth Leapfrog array multiplier using Dynamic Adders.
ISCAS (2) 2004: 437-440 |
| 10 | | Victor Adrian,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A novel combined first and second order Lagrange interpolation sampling process for a digital class D amplifier.
ISCAS (3) 2004: 233-260 |
| 2003 |
|---|
| 9 | | Bah-Hwee Gwee,
Joseph Sylvester Chang:
A Hybrid Genetic Hill-climbing Algorithm for Four-Coloring Map Problems.
HIS 2003: 252-261 |
| 8 | | Bah-Hwee Gwee,
Joseph Sylvester Chang,
Victor Adrian,
H. Amir:
A novel sampling process and pulse generator for a low distortion digital pulse-width modulator for digital class D amplifiers.
ISCAS (4) 2003: 504-507 |
| 7 | | Chien-Chung Chua,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A low-voltage micropower asynchronous multiplier for a multiplierless FIR filter.
ISCAS (5) 2003: 381-384 |
| 6 | | Khia-Ho Chang,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A Low Voltage Micropower 16-Word by 16-Bit 3-Port Asynchronous Register File.
VLSI 2003: 166-172 |
| 2002 |
|---|
| 5 | | Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
Low-voltage micropower asynchronous multiplier for hearing instruments.
ISCAS (1) 2002: 865-868 |
| 4 | | Kwen-Siong Chong,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
Low-voltage asynchronous adders for low power and high speed applications.
ISCAS (1) 2002: 873-876 |
| 2001 |
|---|
| 3 | | Joseph Sylvester Chang,
Bah-Hwee Gwee,
Yong Seng Lon,
Meng Tong Tan:
A novel low-power low-voltage Class D amplifier with feedback for improving THD, power efficiency and gain linearity.
ISCAS (1) 2001: 635-638 |
| 2 | | Huiyun Li,
Bah-Hwee Gwee,
Joseph Sylvester Chang:
A digital Class D amplifier design embodying a novel sampling process and pulse generator.
ISCAS (4) 2001: 826-829 |
| 2000 |
|---|
| 1 | | Bah-Hwee Gwee,
Meng-Hiot Lim:
A GA with heuristic-based decoder for IC floorplanning.
Integration 28(2): 157-172 (2000) |
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