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Arun Gunda Coauthor index pubzone.org

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13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNarendra Devta-Prasanna, Arun Gunda, Sudhakar M. Reddy, Irith Pomeranz: Multiple fault activation cycle tests for transistor stuck-open faults. ITC 2010: 821
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNarendra Devta-Prasanna, Arun Gunda: Clock Gate Test Points. ITC 2010: 84-93
2009
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNarendra Devta-Prasanna, Sandeep Kumar Goel, Arun Gunda, Mark Ward, P. Krishnamurthy: Accurate measurement of small delay defect coverage of test patterns. ITC 2009: 1-10
2008
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAhmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda: Comparative study of centralised and distributed compatibility-based test data compression. IET Computers & Digital Techniques 2(2): 108-117 (2008)
2007
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAhmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda: Systematic Scan Reconfiguration. ASP-DAC 2007: 738-743
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAhmad A. Al-Yamani, Narendra Devta-Prasanna, Erik Chmelar, M. Grinchuk, Arun Gunda: Scan Test Cost and Power Reduction Through Systematic Scan Reconfiguration. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 907-918 (2007)
2006
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNarendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz: Test Generation for Open Defects in CMOS Circuits. DFT 2006: 41-49
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNarendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz: A Unified Method to Detect Transistor Stuck-Open Faults and Transition Delay Faults. European Test Symposium 2006: 185-192
2005
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNarendra Devta-Prasanna, Sudhakar M. Reddy, Arun Gunda, P. Krishnamurthy, Irith Pomeranz: Improved Delay Fault Coverage Using Subsets of Flip-flops to Launch Transitions. Asian Test Symposium 2005: 202-207
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLAhmad A. Al-Yamani, Narendra Devta-Prasanna, Arun Gunda: Should Illinois-Scan Based Architectures be Centralized or Distributed? DFT 2005: 406-414
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNarendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz: A Novel Method of Improving Transition Delay Fault Coverage Using Multiple Scan Enable Signals. ICCD 2005: 471-474
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNarendra Devta-Prasanna, Arun Gunda, P. Krishnamurthy, Sudhakar M. Reddy, Irith Pomeranz: Methods for improving transition delay fault coverage using broadside tests. ITC 2005: 10
1995
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLKaushik De, Arun Gunda: Failure Analysis for Full-Scan Circuits. ITC 1995: 636-645

Coauthor Index

1Ahmad A. Al-Yamani [4] [8] [9] [10]
2Erik Chmelar [8]
3Kaushik De [1]
4Narendra Devta-Prasanna [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
5Sandeep Kumar Goel [11]
6M. Grinchuk [8]
7P. Krishnamurthy [2] [3] [5] [6] [7] [11]
8Irith Pomeranz [2] [3] [5] [6] [7] [13]
9Sudhakar M. Reddy [2] [3] [5] [6] [7] [13]
10Mark Ward [11]

Colors in the list of coauthors

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