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| 2012 | ||
|---|---|---|
| 47 | Meysam Zargham, P. Glenn Gulak: Maximum Achievable Efficiency in Near-Field Coupled Power-Transfer Systems. IEEE Trans. Biomed. Circuits and Systems 6(3): 228-245 (2012) | |
| 46 | Mahdi Shabany, P. Glenn Gulak: A 675 Mbps, 4 $\times$ 4 64-QAM K-Best MIMO Detector in 0.13 $\mu{\rm m}$ CMOS. IEEE Trans. VLSI Syst. 20(1): 135-147 (2012) | |
| 2011 | ||
| 45 | Derek Ho, P. Glenn Gulak, Roman Genov: CMOS field-modulated color sensor. CICC 2011: 1-4 | |
| 44 | Ameer Youssef, Mahdi Shabany, P. Glenn Gulak: Performance analysis of lattice-reduction algorithms for a novel LR-compatible K-Best MIMO detector. ISCAS 2011: 701-704 | |
| 2010 | ||
| 43 | Ameer Youssef, Mahdi Shabany, P. Glenn Gulak: VLSI implementation of a hardware-optimized lattice reduction algorithm for WiMAX/LTE MIMO detection. ISCAS 2010: 3541-3544 | |
| 42 | Dimpesh Patel, Vadim Smolyakov, Mahdi Shabany, P. Glenn Gulak: VLSI implementation of a WiMAX/LTE compliant low-complexity high-throughput soft-output K-Best MIMO detector. ISCAS 2010: 593-596 | |
| 41 | Ritu Raj Singh, Derek Ho, Alireza Nilchi, P. Glenn Gulak, Patrick Yau, Roman Genov: A CMOS/Thin-Film Fluorescence Contact Imaging Microsystem for DNA Analysis. IEEE Trans. on Circuits and Systems 57-I(5): 1029-1038 (2010) | |
| 2009 | ||
| 40 | Ritu Raj Singh, Derek Ho, Alireza Nilchi, Roman Genov, P. Glenn Gulak: A Hybrid Thin-film/CMOS Fluorescence Contact Imager. ISCAS 2009: 2437-2440 | |
| 39 | Dimpesh Patel, Mahdi Shabany, P. Glenn Gulak: A Low-complexity High-speed QR Decomposition Implementation for MIMO Receivers. ISCAS 2009: 33-36 | |
| 38 | Mahdi Shabany, P. Glenn Gulak: A 0.13µm CMOS 655Mb/s 4×4 64-QAM K-Best MIMO detector. ISSCC 2009: 256-257 | |
| 2008 | ||
| 37 | Mahdi Shabany, Krishna Su, P. Glenn Gulak: A pipelined scalable high-throughput implementation of a near-ML K-best complex lattice decoder. ICASSP 2008: 3173-3176 | |
| 36 | Mahdi Shabany, P. Glenn Gulak: The application of lattice-reduction to the K-Best algorithm for near-optimal MIMO detection. ISCAS 2008: 316-319 | |
| 35 | Mahdi Shabany, P. Glenn Gulak: Scalable VLSI architecture for K-best lattice decoders. ISCAS 2008: 940-943 | |
| 34 | Mahdi Shabany, P. Glenn Gulak: A systolic architecture of a Sequential Monte Carlo-based equalizer for frequency-selective MIMO channels. SiPS 2008: 67-72 | |
| 33 | Mahdi Shabany, P. Glenn Gulak: Efficient Compensation of the Nonlinearity of Solid-State Power Amplifiers Using Adaptive Sequential Monte Carlo Methods. IEEE Trans. on Circuits and Systems 55-I(10): 3270-3283 (2008) | |
| 2007 | ||
| 32 | Mahdi Shabany, P. Glenn Gulak: Application of Sequential Monte Carlo to M-QAM Schemes in the Presence of Nonlinear Solid-State Power Amplifiers. ISCAS 2007: 2295-2298 | |
| 31 | Warren J. Gross, Frank R. Kschischang, P. Glenn Gulak: Architecture and Implementation of an Interpolation Processor for Soft-Decision Reed-Solomon Decoding. IEEE Trans. VLSI Syst. 15(3): 309-318 (2007) | |
| 2006 | ||
| 30 | Mahdi Shabany, P. Glenn Gulak: An efficient architecture for distributed resampling for high-speed particle filtering. ISCAS 2006 | |
| 29 | Mahdi Shabany, P. Glenn Gulak: VLSI implementation of a sequential Monte Carlo receiver. ISCAS 2006 | |
| 28 | Y. Eslami, Ali Sheikholeslami, P. Glenn Gulak, S. Masui, K. Mukaida: An area-efficient universal cryptography processor for smart cards. IEEE Trans. VLSI Syst. 14(1): 43-56 (2006) | |
| 27 | Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes. IEEE Transactions on Communications 54(6): 1143 (2006) | |
| 26 | Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Applications of Algebraic Soft-Decision Decoding of Reed-Solomon Codes. IEEE Transactions on Communications 54(7): 1224-1234 (2006) | |
| 2005 | ||
| 25 | David Gnaedig, Emmanuel Boutillon, Michel Jézéquel, Vincent C. Gaudet, P. Glenn Gulak: On Multiple Slice Turbo Codes. Annales des Télécommunications 60(1-2): 79-102 (2005) | |
| 24 | Warren J. Gross, Frank R. Kschischang, Ralf Koetter, P. Glenn Gulak: Towards a VLSI Architecture for Interpolation-Based Soft-Decision Reed-Solomon Decoders. VLSI Signal Processing 39(1-2): 93-111 (2005) | |
| 2004 | ||
| 23 | Warren J. Gross, Frank R. Kschischang, P. Glenn Gulak: An FPGA Interpolation Processor for Soft-Decision Reed-Solomon Decoding. FCCM 2004: 310-311 | |
| 2003 | ||
| 22 | Emmanuel Boutillon, Warren J. Gross, P. Glenn Gulak: VLSI architectures for the MAP algorithm. IEEE Transactions on Communications 51(2): 175-185 (2003) | |
| 21 | Tooraj Esmailian, Frank R. Kschischang, P. Glenn Gulak: In-building power lines as high-speed communication channels: channel characterization and a test channel ensemble. Int. J. Communication Systems 16(5): 381-400 (2003) | |
| 1998 | ||
| 20 | P. Glenn Gulak: A Review of Multiple-Valued Memory Technology. ISMVL 1998: 222-231 | |
| 19 | Ali Sheikholeslami, R. Yoshimura, P. Glenn Gulak: Look-up Tables (LUTs) for Multiple-Valued, Combinational Logic. ISMVL 1998: 264-269 | |
| 18 | Kerry S. Lowe, P. Glenn Gulak: A joint gate sizing and buffer insertion method for optimizing delay and power in CMOS and BiCMOS combinational logic. IEEE Trans. on CAD of Integrated Circuits and Systems 17(5): 419-434 (1998) | |
| 17 | Vincent C. Gaudet, P. Glenn Gulak: Implementation Issues for High-Bandwidth Field-Programmable Analog Arrays. Journal of Circuits, Systems, and Computers 8(5-6): 541-558 (1998) | |
| 1997 | ||
| 16 | Kenneth J. Schultz, P. Glenn Gulak: Physical performance limits for shared buffer ATM switches. IEEE Transactions on Communications 45(8): 997-1007 (1997) | |
| 15 | Kenneth J. Schultz, P. Glenn Gulak: Authors' reply to "A note on architectures for large-capacity CAMs". Integration 22(1-2): 173-176 (1997) | |
| 1996 | ||
| 14 | Ali Sheikholeslami, P. Glenn Gulak, Takahiro Hanyu: A Multiple-Valued Ferroelectric Content-Addressable Memory. ISMVL 1996: 74-79 | |
| 13 | Kenneth J. Schultz, P. Glenn Gulak: Multicast contention resolution with single-cycle windowing using content addressable FIFO's. IEEE/ACM Trans. Netw. 4(5): 731-742 (1996) | |
| 1995 | ||
| 12 | Paul Chow, P. Glenn Gulak: A Field-Programmable Mixed-Analog-Digital Array. FPGA 1995: 104-109 | |
| 11 | Kenneth J. Schultz, P. Glenn Gulak: Architectures for large-capacity CAMs. Integration 18(2-3): 151-171 (1995) | |
| 1994 | ||
| 10 | Gennady Feygin, P. Glenn Gulak, Paul Chow: Architectural Advances in the VLSI Implementation of Arithmetic Coding for Binary Image Compression. Data Compression Conference 1994: 254-263 | |
| 9 | Kerry S. Lowe, P. Glenn Gulak: A unified discrete gate sizing/cell library optimization method for design and analysis of delay minimized CMOS and BiCMOS circuits. EURO-DAC 1994: 42-47 | |
| 8 | Gennady Feygin, P. Glenn Gulak, Paul Chow: Minimizing Excess Code Length and VLSI Complexity in the Multiplication Free Approximation of Arithmetic Coding. Inf. Process. Manage. 30(6): 805-816 (1994) | |
| 1993 | ||
| 7 | Gennady Feygin, P. Glenn Gulak, Paul Chow: Minimizing Error and VLSI Complexity in the Multiplication-Free Approximation of Arithmetic Coding. Data Compression Conference 1993: 118-127 | |
| 6 | Kerry S. Lowe, P. Glenn Gulak: Gate sizing and buffer insertion for optimizing performance in power constrained BiCMOS circuits. ICCAD 1993: 216-219 | |
| 5 | Gennady Feygin, Paul Chow, P. Glenn Gulak, John Chappel, Grant Goodes, Oswin Hall, Ahmad Sayes, Satwant Singh, Michael B. Smith, Steven J. E. Wilton: A VLSI Implementation of a Cascade Viterbi Decoder with Traceback. ISCAS 1993: 1945-1948 | |
| 4 | Kenneth J. Schultz, P. Glenn Gulak: A Logic-enhanced Memory for Digital Data Recovery Circuits. ISCAS 1993: 2007-2010 | |
| 1992 | ||
| 3 | Edward K. F. Lee, P. Glenn Gulak: Dynamic Current-Mode Multi-Valued MOS Memory with Error Correction. ISMVL 1992: 208-215 | |
| 1987 | ||
| 2 | Howard C. Card, P. Glenn Gulak, Robert D. McLeod, Werner Pries: (lambda, T) Complexity Measures for VLSI Computations in Constant Chip Area. IEEE Trans. Computers 36(1): 112-117 (1987) | |
| 1986 | ||
| 1 | Gregory E. Bridges, Werner Pries, Robert D. McLeod, M. Yunik, P. Glenn Gulak, Howard C. Card: Dual Systolic Architectures for VLSI Digital Signal Processing Systems. IEEE Trans. Computers 35(10): 916-923 (1986) | |
Colors in the list of coauthors
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