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| 2012 | ||
|---|---|---|
| 73 | Cédric Murdica, Sylvain Guilley, Jean-Luc Danger, Philippe Hoogvorst, David Naccache: Same Values Power Analysis Using Special Points on Elliptic Curves. COSADE 2012: 183-198 | |
| 72 | Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger: A First-Order Leak-Free Masking Countermeasure. CT-RSA 2012: 156-170 | |
| 71 | Youssef Souissi, Shivam Bhasin, Sylvain Guilley, Maxime Nassar, Jean-Luc Danger: Towards Different Flavors of Combined Side Channel Attacks. CT-RSA 2012: 245-259 | |
| 70 | Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger: RSM: A small and fast countermeasure for AES, secure against 1st and 2nd-order zero-offset SCAs. DATE 2012: 1173-1178 | |
| 69 | Sylvain Guilley, Jean-Luc Danger, Robert Nguyen, Philippe Nguyen: System-Level Methods to Prevent Reverse-Engineering, Cloning, and Trojan Insertion. ICISTM 2012: 433-438 | |
| 68 | Houssem Maghrebi, Claude Carlet, Sylvain Guilley, Jean-Luc Danger: Optimal First-Order Masking with Linear and Non-Linear Bijections. IACR Cryptology ePrint Archive 2012: 175 (2012) | |
| 67 | Houssem Maghrebi, Emmanuel Prouff, Sylvain Guilley, Jean-Luc Danger: A First-Order Leak-Free Masking Countermeasure. IACR Cryptology ePrint Archive 2012: 28 (2012) | |
| 66 | Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu: Blind Cartography for Side Channel Attacks: Cross-Correlation Cartography. Int. J. Reconfig. Comp. 2012: (2012) | |
| 65 | M. Abdelaziz Elaabid, Sylvain Guilley: Portability of templates. J. Cryptographic Engineering 2(1): 63-74 (2012) | |
| 2011 | ||
| 64 | Luca Breveglieri, Sylvain Guilley, Israel Koren, David Naccache, Junko Takahashi: 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography, FDTC 2011, Tokyo, Japan, September 29, 2011 IEEE 2011 | |
| 63 | Youssef Souissi, Jean-Luc Danger, Sylvain Guilley, Shivam Bhasin, Maxime Nassar: Embedded systems security: An evaluation methodology against Side Channel Attacks. DASIP 2011: 230-237 | |
| 62 | Olivier Meynard, Denis Réal, Florent Flament, Sylvain Guilley, Naofumi Homma, Jean-Luc Danger: Enhancement of simple electro-magnetic attacks by pre-characterization in frequency domain and demodulation techniques. DATE 2011: 1004-1009 | |
| 61 | Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger: Formal security evaluation of hardware Boolean masking against second-order attacks. HOST 2011: 40-46 | |
| 60 | Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Denis Réal: Performance evaluation of protocols resilient to physical attacks. HOST 2011: 51-56 | |
| 59 | Maxime Nassar, Sylvain Guilley, Jean-Luc Danger: Formal Analysis of the Entropy / Security Trade-off in First-Order Masking Countermeasures against Side-Channel Attacks. INDOCRYPT 2011: 22-39 | |
| 58 | Maxime Nassar, Youssef Souissi, Sylvain Guilley, Jean-Luc Danger: "Rank Correction": A New Side-Channel Approach for Secret Key Recovery. InfoSecHiComNet 2011: 128-143 | |
| 57 | Shivam Bhasin, Sylvain Guilley, Youssef Souissi, Tarik Graba, Jean-Luc Danger: Efficient Dual-Rail Implementations in FPGA Using Block RAMs. ReConFig 2011: 261-267 | |
| 56 | Sylvain Guilley, Karim Khalfallah, Victor Lomné, Jean-Luc Danger: Formal Framework for the Evaluation of Waveform Resynchronization Algorithms. WISTP 2011: 100-115 | |
| 55 | Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger: Leakage Squeezing Countermeasure against High-Order Attacks. WISTP 2011: 208-223 | |
| 54 | Manuel San Pedro, Mate Soos, Sylvain Guilley: FIRE: Fault Injection for Reverse Engineering. WISTP 2011: 280-293 | |
| 53 | Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin: A Secure Asynchronous FPGA Architecture, Experimental Results and Some Debug Feedback CoRR abs/1103.1360: (2011) | |
| 52 | Sumanta Chaudhuri, Sylvain Guilley: Side-Channel Oscilloscope CoRR abs/1103.1824: (2011) | |
| 51 | Houssem Maghrebi, Sylvain Guilley, Claude Carlet, Jean-Luc Danger: Classification of High-Order Boolean Masking Schemes and Improvements of their Efficiency. IACR Cryptology ePrint Archive 2011: 520 (2011) | |
| 50 | Maxime Nassar, Sylvain Guilley, Jean-Luc Danger: Formal Analysis of the Entropy / Security Trade-off in First-Order Masking Countermeasures against Side-Channel Attacks. IACR Cryptology ePrint Archive 2011: 534 (2011) | |
| 2010 | ||
| 49 | M. Abdelaziz Elaabid, Sylvain Guilley: Practical Improvements of Profiled Side-Channel Attacks on a Hardware Crypto-Accelerator. AFRICACRYPT 2010: 243-260 | |
| 48 | Shivam Bhasin, Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger: Unrolling Cryptographic Circuits: A Simple Countermeasure Against Side-Channel Attacks. CT-RSA 2010: 195-207 | |
| 47 | Maxime Nassar, Shivam Bhasin, Jean-Luc Danger, Guillaume Duc, Sylvain Guilley: BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluation. DATE 2010: 849-854 | |
| 46 | Olivier Meynard, Sylvain Guilley, Jean-Luc Danger, Laurent Sauvage: Far Correlation-based EMA with a precharacterized leakage model. DATE 2010: 977-980 | |
| 45 | Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane: Fault Injection Resilience. FDTC 2010: 51-65 | |
| 44 | Houssem Maghrebi, Sylvain Guilley, Jean-Luc Danger, Florent Flament: Entropy-based Power Attack. HOST 2010: 1-6 | |
| 43 | Youssef Souissi, Sylvain Guilley, Jean-Luc Danger, Sami Mekki, Guillaume Duc: Improvement of power analysis attacks using Kalman filter. ICASSP 2010: 1778-1781 | |
| 42 | Youssef Souissi, Maxime Nassar, Sylvain Guilley, Jean-Luc Danger, Florent Flament: First Principal Components Analysis: A New Side Channel Distinguisher. ICISC 2010: 407-419 | |
| 41 | Olivier Meynard, Denis Réal, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Frédéric Valette: Characterization of the Electromagnetic Side Channel in Frequency Domain. Inscrypt 2010: 471-486 | |
| 40 | Sylvain Guilley, Laurent Sauvage, Julien Micolod, Denis Réal, Frédéric Valette: Defeating Any Secret Cryptography with SCARE Attacks. LATINCRYPT 2010: 273-293 | |
| 39 | Laurent Sauvage, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu: Cross-Correlation Cartography. ReConFig 2010: 268-273 | |
| 38 | Zouha Cherif, Florent Flament, Jean-Luc Danger, Shivam Bhasin, Sylvain Guilley, Hervé Chabanne: Evaluation of White-Box and Grey-Box Noekeon Implementations in FPGA. ReConFig 2010: 310-315 | |
| 37 | Shivam Bhasin, Sylvain Guilley, Florent Flament, Nidhal Selmane, Jean-Luc Danger: Countering early evaluation: an approach towards robust dual-rail precharge logic. WESS 2010: 6 | |
| 36 | M. Abdelaziz Elaabid, Olivier Meynard, Sylvain Guilley, Jean-Luc Danger: Combined Side-Channel Attacks. WISA 2010: 175-190 | |
| 35 | M. Abdelaziz Elaabid, Sylvain Guilley: Practical Improvements of Profiled Side-Channel Attacks on a Hardware Crypto-Accelerator. IACR Cryptology ePrint Archive 2010: 116 (2010) | |
| 34 | Sylvain Guilley, Laurent Sauvage, Florent Flament, Vinh-Nga Vong, Philippe Hoogvorst, Renaud Pacalet: Evaluation of Power Constant Dual-Rail Logics Countermeasures against DPA with Design Time Security Metrics. IEEE Trans. Computers 59(9): 1250-1263 (2010) | |
| 33 | Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu: Exploiting Dual-Output Programmable Blocks to Balance Secure Dual-Rail Logics. Int. J. Reconfig. Comp. 2010: (2010) | |
| 2009 | ||
| 32 | Mohaned Kafi, Sylvain Guilley, Sandra Marcello, David Naccache: Deconvolving Protected Signals. ARES 2009: 687-694 | |
| 31 | Laurent Sauvage, Sylvain Guilley, Jean-Luc Danger, Yves Mathieu, Maxime Nassar: Successful attack on an FPGA-based WDDL DES cryptoprocessor without place and route constraints. DATE 2009: 640-645 | |
| 30 | Nidhal Selmane, Shivam Bhasin, Sylvain Guilley, Tarik Graba, Jean-Luc Danger: WDDL is Protected against Setup Time Violation Attacks. FDTC 2009: 73-83 | |
| 29 | Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Nidhal Selmane: Security Evaluation of Different AES Implementations Against Practical Setup Time Violation Attacks in FPGAs. HOST 2009: 15-21 | |
| 28 | Sylvain Guilley, Sumanta Chaudhuri, Laurent Sauvage, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet: Updates on the potential of clock-less logics to strengthen cryptographic circuits against side-channel attacks. ICECS 2009: 351-354 | |
| 27 | Shivam Bhasin, Jean-Luc Danger, Florent Flament, Tarik Graba, Sylvain Guilley, Yves Mathieu, Maxime Nassar, Laurent Sauvage, Nidhal Selmane: Combined SCA and DFA Countermeasures Integrable in a FPGA Design Flow. ReConFig 2009: 213-218 | |
| 26 | Laurent Sauvage, Maxime Nassar, Sylvain Guilley, Florent Flament, Jean-Luc Danger, Yves Mathieu: DPL on Stratix II FPGA: What to Expect?. ReConFig 2009: 243-248 | |
| 25 | Jean-Luc Danger, Sylvain Guilley, Philippe Hoogvorst: High speed true random number generator based on open loop structures in FPGAs. Microelectronics Journal 40(11): 1650-1656 (2009) | |
| 24 | Laurent Sauvage, Sylvain Guilley, Yves Mathieu: Electromagnetic Radiations of FPGAs: High Spatial Resolution Cartography and Attack on a Cryptographic Module. TRETS 2(1): (2009) | |
| 2008 | ||
| 23 | Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger, Taha Beyrouthy, Alin Razafindraibe, Laurent Fesquet, Marc Renaudin: Physical Design of FPGA Interconnect to Prevent Information Leakage. ARC 2008: 87-98 | |
| 22 | Sumanta Chaudhuri, Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Jean-Luc Danger: An 8x8 run-time reconfigurable FPGA embedded in a SoC. DAC 2008: 120-125 | |
| 21 | Nidhal Selmane, Sylvain Guilley, Jean-Luc Danger: Practical Setup Time Violation Attacks on AES. EDCC 2008: 91-96 | |
| 20 | Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Nidhal Selmane, Renaud Pacalet: Silicon-level Solutions to Counteract Passive and Active Attacks. FDTC 2008: 3-17 | |
| 19 | Sumanta Chaudhuri, Jean-Luc Danger, Philippe Hoogvorst, Sylvain Guilley: Efficient tiling patterns for reconfigurable gate arrays. FPGA 2008: 257 | |
| 18 | Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Philippe Hoogvorst: Area optimization of cryptographic co-processors implemented in dual-rail with precharge positive logic. FPL 2008: 161-166 | |
| 17 | Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Laurent Sauvage, Philippe Hoogvorst, Maxime Nassar, Tarik Graba, Vinh-Nga Vong: Place-and-Route Impact on the Security of DPL Designs in FPGAs. HOST 2008: 26-32 | |
| 16 | Farouk Khelil, Mohamed Hamdi, Sylvain Guilley, Jean-Luc Danger, Nidhal Selmane: Fault Analysis Attack on an FPGA AES Implementation. NTMS 2008: 1-5 | |
| 15 | Sumanta Chaudhuri, Sylvain Guilley, Philippe Hoogvorst, Jean-Luc Danger: Efficient tiling patterns for reconfigurable gate arrays. SLIP 2008: 11-18 | |
| 14 | Sylvain Guilley, Laurent Sauvage, Jean-Luc Danger, Tarik Graba, Yves Mathieu: Evaluation of Power-Constant Dual-Rail Logic as a Protection of Cryptographic Applications in FPGAs. SSIRI 2008: 16-23 | |
| 13 | Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Danger, Taha Beyrouthy, Laurent Fesquet: A Reconfigurable Programmable Logic Block for a Multi-Style Asynchronous FPGA resistant to Side-Channel Attacks CoRR abs/0809.3942: (2008) | |
| 12 | Sylvain Guilley, Laurent Sauvage, Philippe Hoogvorst, Renaud Pacalet, Guido Marco Bertoni, Sumanta Chaudhuri: Security Evaluation of WDDL and SecLib Countermeasures against Power Attacks. IEEE Trans. Computers 57(11): 1482-1497 (2008) | |
| 2007 | ||
| 11 | Sumanta Chaudhuri, Jean-Luc Danger, Sylvain Guilley: Efficient Modeling and Floorplanning of Embedded-FPGA Fabric. FPL 2007: 665-669 | |
| 10 | Qing Xu, M. B. C. Silva, Jean-Luc Danger, Sylvain Guilley, Patrick Bellot, Philippe Gallion, Francisco Mendieta: Towards Quantum Key Distribution System using Homodyne Detection with Differential Time-Multiplexed Reference. RIVF 2007: 158-165 | |
| 9 | Philippe Hoogvorst, Sylvain Guilley, Sumanta Chaudhuri, Alin Razafindraibe, Taha Beyrouthy, Laurent Fesquet: A Reconfigurable Cell for a Multi-Style Asynchronous FPGA. ReCoSoC 2007: 15-22 | |
| 8 | M. Abdelaziz Elaabid, Sylvain Guilley, Philippe Hoogvorst: Template Attacks with a Power Model. IACR Cryptology ePrint Archive 2007: 443 (2007) | |
| 7 | Sylvain Guilley, Florent Flament, Philippe Hoogvorst, Renaud Pacalet, Yves Mathieu: Secured CAD Back-End Flow for Power-Analysis-Resistant Cryptoprocessors. IEEE Design & Test of Computers 24(6): 546-555 (2007) | |
| 6 | Sylvain Guilley, Philippe Hoogvorst, Renaud Pacalet: A fast pipelined multi-mode DES architecture operating in IP representation. Integration 40(4): 479-489 (2007) | |
| 2005 | ||
| 5 | Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet: The "Backend Duplication" Method. CHES 2005: 383-397 | |
| 4 | Sylvain Guilley, Philippe Hoogvorst: The Proof by 2M-1: a Low-Cost Method to Check Arithmetic Computations. SEC 2005: 589-600 | |
| 2004 | ||
| 3 | Sylvain Guilley, Philippe Hoogvorst, Renaud Pacalet: Differential Power Analysis Model and Some Results. CARDIS 2004: 127-142 | |
| 2 | Sylvain Guilley, Philippe Hoogvorst, Yves Mathieu, Renaud Pacalet, Jean Provost: CMOS Structures Suitable for Secured Hardware. DATE 2004: 1414-1415 | |
| 1 | Sylvain Guilley, Renaud Pacalet: SoCs security: a war against side-channels. Annales des Télécommunications 59(7-8): 998-1009 (2004) | |
Colors in the list of coauthors
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