 | 2010 |
|---|
| 5 |       | Xuguang Guan,
Yu Liu,
Yintang Yang:
Performance Analysis of Low Power Null Convention Logic Units with Power Cutoff.
APWCS 2010: 55-58 |
| 4 | | Yu Liu,
Xuguang Guan,
Yang Yang,
Yintang Yang:
An asynchronous low latency ordered arbiter for network on chips.
ICNC 2010: 962-966 |
| 3 | | Xuguang Guan,
Zhangming Zhu,
Duan Zhou,
Yintang Yang:
High Speed Multi-Resource Arbiter with Active Virtual Channel Allocation for Network on Chips.
Journal of Circuits, Systems, and Computers 19(7): 1579-1596 (2010) |
| 2009 |
|---|
| 2 | | Xuguang Guan,
Duan Zhou,
Yintang Yang,
Zhangming Zhu:
A GALS Delay-insensitive Self-timed Wrapper for Network on Chips.
PACCS 2009: 265-268 |
| 1 | | Xuguang Guan,
Duan Zhou,
Dan Wang,
Yintang Yang,
Zhangming Zhu:
A Novel GALS Single-Track Protocol Asynchronous Communication Circuits.
PACCS 2009: 269-272 |
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