 | 2012 |
| 9 |  | Xuan Guan,
Yunsi Fei,
Hai Lin:
Hierarchical Design of an Application-Specific Instruction Set Processor for High-Throughput and Scalable FFT Processing.
IEEE Trans. VLSI Syst. 20(3): 551-563 (2012) |
| 2011 |
| 8 |  | Xuan Guan,
Yunsi Fei:
Adaptive Extended Min-Sum Algorithm for Nonbinary LDPC Decoding.
GLOBECOM 2011: 1-6 |
| 2010 |
| 7 |  | Xuan Guan,
Yunsi Fei:
Register file partitioning and recompilation for register file power reduction.
ACM Trans. Design Autom. Electr. Syst. 15(3): (2010) |
| 6 |  | Hai Lin,
Yunsi Fei,
Xuan Guan,
Zhijie Jerry Shi:
Architectural Enhancement and System Software Support for Program Code Integrity Monitoring in Application-Specific Instruction-Set Processors.
IEEE Trans. VLSI Syst. 18(11): 1519-1532 (2010) |
| 5 |  | Xuan Guan,
Yunsi Fei:
Register File Partitioning and Compiler Support for Reducing Embedded Processor Power Consumption.
IEEE Trans. VLSI Syst. 18(8): 1248-1252 (2010) |
| 2009 |
| 4 |  | Xuan Guan,
Hai Lin,
Yunsi Fei:
Design of an application-specific instruction set processor for high-throughput and scalable FFT.
DATE 2009: 1302-1307 |
| 3 |  | Xuan Guan,
Yunsi Fei,
Hai Lin:
A Hierarchical Design of an Application-specific Instruction Set Processor for High-throughput FFT.
ISCAS 2009: 2513-2516 |
| 2008 |
| 2 |  | Xuan Guan,
Yunsi Fei:
Reducing power consumption of embedded processors through register file partitioning and compiler support.
ASAP 2008: 269-274 |
| 2007 |
| 1 |  | Hai Lin,
Xuan Guan,
Yunsi Fei,
Zhijie Jerry Shi:
Compiler-assisted architectural support for program code integrity monitoring in application-specific instruction set processors.
ICCD 2007: 187-193 |