Ruei-Ting Gu

	2011
2		Chih-Yun Pai, Ruei-Ting Gu, Bo-Chuan Cheng, Liang-Bi Chen, Katherine Shu-Min Li: A Unified Interconnects Testing Scheme for 3D Integrated Circuits. Asian Test Symposium 2011: 195-200
	2009
1		Liang-Bi Chen, Ruei-Ting Gu, Wei-Sheng Huang, Chien-Chou Wang, Wen-Chi Shiue, Tsung-Yu Ho, Yun-Nan Chang, Shen-Fu Hsiao, Chung-Nan Lee, Ing-Jer Huang: An 8.69 Mvertices/s 278 Mpixels/s tile-based 3D graphics SoC HW/SW development for consumer electronics. ASP-DAC 2009: 131-132

Coauthor Index

1	Yun-Nan Chang	[1]
2	Liang-Bi Chen	[1] [2]
3	Bo-Chuan Cheng	[2]
4	Tsung-Yu Ho	[1]
5	Shen-Fu Hsiao	[1]
6	Ing-Jer Huang	[1]
7	Wei-Sheng Huang	[1]
8	Chung-Nan Lee	[1]
9	Katherine Shu-Min Li	[2]
10	Chih-Yun Pai	[2]
11	Wen-Chi Shiue	[1]
12	Chien-Chou Wang	[1]

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