 | 2009 |
|---|
| 8 |       | Matthew M. Ziegler,
Victor V. Zyuban,
George Gristede,
Milena Vratonjic,
Joshua Friedrich:
The opportunity cost of low power design: a case study in circuit tuning.
ISLPED 2009: 133-138 |
| 7 | | Milena Vratonjic,
Matthew M. Ziegler,
George Gristede,
Victor V. Zyuban,
Thomas Mitchell,
Ee Cho,
Chandu Visweswariah,
Vojin G. Oklobdzija:
A New Methodology for Power-Aware Transistor Sizing: Free Power Recovery (FPR).
PATMOS 2009: 307-316 |
| 2005 |
|---|
| 6 | | Phillip Chin,
Charles A. Zukowski,
George Gristede,
Stephen V. Kosonocky:
Characterization of logic circuit techniques and optimization for high-leakage CMOS technologies.
Integration 38(3): 491-504 (2005) |
| 2004 |
|---|
| 5 | | Phillip Chin,
Charles A. Zukowski,
George Gristede,
Stephen V. Kosonocky:
Characterization of logic circuit techniques for high leakage CMOS technologies.
ACM Great Lakes Symposium on VLSI 2004: 230-235 |
| 2003 |
|---|
| 4 | | Stephen V. Kosonocky,
Azeez J. Bhavnagarwala,
Kenneth Chin,
George Gristede,
Anne-Marie Haen,
Wei Hwang,
Mark B. Ketchen,
Suhwan Kim,
Daniel R. Knebel,
Kevin W. Warren,
Victor V. Zyuban:
Low-power circuits and technology for wireless digital systems.
IBM Journal of Research and Development 47(2-3): 283-298 (2003) |
| 2001 |
|---|
| 3 | | W. Chen,
Wei Hwang,
Prabhakar Kudva,
George Gristede,
Stephen V. Kosonocky,
Rajiv V. Joshi:
Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI design.
ISLPED 2001: 263-266 |
| 2000 |
|---|
| 2 | | George Gristede,
Wei Hwang:
A comparison of dual-rail pass transistor logic families in 1.5V, 0.18µm CMOS technology for low power applications.
ACM Great Lakes Symposium on VLSI 2000: 101-106 |
| 1990 |
|---|
| 1 |  | Charles A. Zukowski,
George Gristede,
Albert E. Ruehli:
Measuring Error Propagation in Waveform Relaxation Algorithms.
ICCAD 1990: 170-173 |
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