Elena Gramatová

	2011
13		Miroslav Manik, Elena Gramatová: Efficient diagnostics algorithms for regular computing structures. DDECS 2011: 87-92
12		Roland Dobai, Elena Gramatová: A novel automatic test pattern generator for asynchronous sequential digital circuits. Microelectronics Journal 42(3): 501-508 (2011)
	2010
11		Elena Gramatová, Zdenek Kotásek, Andreas Steininger, Heinrich Theodor Vierhaus, Horst Zimmermann: 13th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, DDECS 2010, Vienna, Austria, April 14-16, 2010 IEEE 2010
10		Roland Dobai, Elena Gramatová: Test pattern generation for the combinational representation of asynchronous circuits. DDECS 2010: 323-328
9		Roland Dobai, Elena Gramatová: Deductive Fault Simulation Technique for Asynchronous Circuits. Computing and Informatics 29(6): 1025-1043 (2010)
	2009
8		Miroslav Manik, Elena Gramatová: Diagnosis of faulty units in regular graphs under the PMC model. DDECS 2009: 202-205
7		Roland Dobai, Elena Gramatová: Deductive Fault Simulation for Asynchronous Sequential Circuits. DSD 2009: 459-464
	2008
6		Miroslav Manik, Elena Gramatová: Boolean Formalisation of the PMC Model for Faulty Units Diagnosis in Regular Multi-Processor Systems. DDECS 2008: 144-145
	2007
5		Patrick Girard, Andrzej Krasniewski, Elena Gramatová, Adam Pawlak, Tomasz Garbolino: Proceedings of the 10th IEEE Workshop on Design & Diagnostics of Electronic Circuits & Systems (DDECS 2007), Kraków, Poland, April 11-13, 2007 IEEE Computer Society 2007
	2002
4		André Schneider, Karl-Heinz Diener, Eero Ivask, Jaan Raik, Raimund Ubar, P. Miklos, T. Cibáková, Elena Gramatová: Internet-Based Collaborative Test Generation with MOSCITO. DATE 2002: 221-226
3		André Schneider, Karl-Heinz Diener, Eero Ivask, Raimund Ubar, Elena Gramatová, Thomas Hollstein, Wieslaw Kuzmicz, Zebo Peng: Integrated Design and Test Generation Under Internet Based Environment MOSCITO. DSD 2002: 187-195
2		T. Cibáková, María Fischerová, Elena Gramatová, Wieslaw Kuzmicz, Witold A. Pleskacz, Jaan Raik, Raimund Ubar: Hierarchical test generation for combinational circuits with real defects coverage. Microelectronics Reliability 42(7): 1141-1149 (2002)
	1994
1		P. Gramata, P. Trebaticky, Elena Gramatová: The MD5 Message-Digest Algorithm in the XILINX FPGA. FPL 1994: 126-128

Coauthor Index

1	T. Cibáková	[2] [4]
2	Karl-Heinz Diener	[3] [4]
3	Roland Dobai	[7] [9] [10] [12]
4	María Fischerová	[2]
5	Tomasz Garbolino	[5]
6	Patrick Girard	[5]
7	P. Gramata	[1]
8	Thomas Hollstein	[3]
9	Eero Ivask	[3] [4]
10	Zdenek Kotásek	[11]
11	Andrzej Krasniewski	[5]
12	Wieslaw Kuzmicz	[2] [3]
13	Miroslav Manik	[6] [8] [13]
14	P. Miklos	[4]
15	Adam Pawlak	[5]
16	Zebo Peng	[3]
17	Witold A. Pleskacz	[2]
18	Jaan Raik	[2] [4]
19	André Schneider	[3] [4]
20	Andreas Steininger	[11]
21	P. Trebaticky	[1]
22	Raimund Ubar	[2] [3] [4]
23	Heinrich Theodor Vierhaus	[11]
24	Horst Zimmermann	[11]

Colors in the list of coauthors

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