Tejaswi Gowda

	2011
4		Tejaswi Gowda, Sarma B. K. Vrudhula, N. Kulkarni, Krzysztof S. Berezowski: Identification of Threshold Functions and Synthesis of Threshold Networks. IEEE Trans. on CAD of Integrated Circuits and Systems 30(5): 665-677 (2011)
	2008
3		Tejaswi Gowda, Sarma B. K. Vrudhula: Decomposition based approach for synthesis of multi-level threshold logic circuits. ASP-DAC 2008: 125-130
2		Tejaswi Gowda, Samuel Leshner, Sarma B. K. Vrudhula, Seungchan Kim: Threshold Logic Gene Regulatory Model - Prediction of Dorsal-ventral Patterning and Hardware-based Simulation of Drosophila. BIODEVICES (1) 2008: 212-219
	2007
1		Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevod: Combinational equivalence checking for threshold logic circuits. ACM Great Lakes Symposium on VLSI 2007: 102-107

Coauthor Index

1	Krzysztof S. Berezowski	[4]
2	Seungchan Kim	[2]
3	Goran Konjevod	[1]
4	N. Kulkarni	[4]
5	Samuel Leshner	[2]
6	Sarma B. K. Vrudhula	[1] [2] [3] [4]

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