 | 2011 |
|---|
| 8 |       | Saeid Gorgin,
Ghassem Jaberipur:
A Family of High Radix Signed Digit Adders.
IEEE Symposium on Computer Arithmetic 2011: 112-120 |
| 7 | | Mahdy Zolghadr,
Koosha Mirhosseini,
Saeid Gorgin,
Abbas Nayebi:
GPU-based NoC simulator.
MEMOCODE 2011: 83-88 |
| 2010 |
|---|
| 6 | | Ghassem Jaberipur,
Saeid Gorgin:
An improved maximally redundant signed digit adder.
Computers & Electrical Engineering 36(3): 491-502 (2010) |
| 5 | | Ghassem Jaberipur,
Behrooz Parhami,
Saeid Gorgin:
Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value.
IEEE Trans. Computers 59(5): 694-706 (2010) |
| 2009 |
|---|
| 4 | | Saeid Gorgin,
Ghassem Jaberipur:
Fully Redundant Decimal Arithmetic.
IEEE Symposium on Computer Arithmetic 2009: 145-152 |
| 3 | | Saeid Gorgin,
Ghassem Jaberipur:
A fully redundant decimal adder and its application in parallel decimal multipliers.
Microelectronics Journal 40(10): 1471-1481 (2009) |
| 2007 |
|---|
| 2 | | Saeid Gorgin,
Amir Kaivani:
Reversible Barrel Shifters.
AICCSA 2007: 479-483 |
| 2006 |
|---|
| 1 | | Amir Kaivani,
Ali Zakerolhosseini,
Saeid Gorgin,
Mahmood Fazlali:
Reversible Implementation of Densely-Packed-Decimal Converter to and from Binary-Coded-Decimal Format Using in IEEE-754R.
ICIT 2006: 273-276 |
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