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| 2010 | ||
|---|---|---|
| 5 | Ashok Kumar Palaniswamy, Manoj Kumar Goparaju, Spyros Tragoudas: Scalable identification of threshold logic functions. ACM Great Lakes Symposium on VLSI 2010: 269-274 | |
| 2008 | ||
| 4 | Manoj Kumar Goparaju, Ashok Kumar Palaniswamy, Spyros Tragoudas: A Fault Tolerance Aware Synthesis Methodology for Threshold Logic Gate Networks. DFT 2008: 176-183 | |
| 3 | Manoj Kumar Goparaju, Spyros Tragoudas: A Novel ATPG Framework to Detect Weight Related Defects in Threshold Logic Gates. VTS 2008: 323-328 | |
| 2007 | ||
| 2 | Manoj Kumar Goparaju, Spyros Tragoudas: A Fault Tolerant Design Methodology for Threshold Logic Gates and Its Optimizations. ISQED 2007: 420-425 | |
| 2006 | ||
| 1 | Sandeep Dechu, Manoj Kumar Goparaju, Spyros Tragoudas: A Metric of Tolerance for the Manufacturing Defects of Threshold Logic Gates. DFT 2006: 318-326 | |
| 1 | Sandeep Dechu | [1] |
| 2 | Ashok Kumar Palaniswamy | [4] [5] |
| 3 | Spyros Tragoudas | [1] [2] [3] [4] [5] |
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