 | 2010 |
|---|
| 6 |       | Daniel Gomez-Prado,
Dusung Kim,
Maciej J. Ciesielski,
Emmanuel Boutillon:
Retiming arithmetic datapaths using Timed Taylor Expansion Diagrams.
HLDVT 2010: 33-39 |
| 2009 |
|---|
| 5 | | Daniel Gomez-Prado,
Q. Ren,
Maciej J. Ciesielski,
Jérémie Guillot,
Emmanuel Boutillon:
Optimizing data flow graphs to minimize hardware implementation.
DATE 2009: 117-122 |
| 4 | | Maciej J. Ciesielski,
Jérémie Guillot,
Daniel Gomez-Prado,
Emmanuel Boutillon:
High-Level Dataflow Transformations Using Taylor Expansion Diagrams.
IEEE Design & Test of Computers 26(4): 46-57 (2009) |
| 3 | | Maciej J. Ciesielski,
Daniel Gomez-Prado,
Q. Ren,
Jérémie Guillot,
Emmanuel Boutillon:
Optimization of Data-Flow Computations Using Canonical TED Representation.
IEEE Trans. on CAD of Integrated Circuits and Systems 28(9): 1321-1333 (2009) |
| 2007 |
|---|
| 2 | | Maciej J. Ciesielski,
Serkan Askar,
Daniel Gomez-Prado,
Jérémie Guillot,
Emmanuel Boutillon:
Data-flow transformations using Taylor expansion diagrams.
DATE 2007: 455-460 |
| 2006 |
|---|
| 1 | | Jérémie Guillot,
Emmanuel Boutillon,
Q. Ren,
Maciej J. Ciesielski,
Daniel Gomez-Prado,
Serkan Askar:
Efficient factorization of DSP transforms using taylor expansion diagrams.
DATE 2006: 754-755 |
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