 | 2012 |
|---|
| 9 |       | Houman Homayoun,
Mehryar Rahmatian,
Vasileios Kontorinis,
Shahin Golshan,
Dean M. Tullsen:
Hot peripheral thermal management to mitigate cache temperature variation.
ISQED 2012: 755-763 |
| 2011 |
|---|
| 8 | | Shahin Golshan,
Amin Khajeh,
Houman Homayoun,
Eli Bozorgzadeh,
Ahmed M. Eltawil,
Fadi J. Kurdahi:
Reliability-aware placement in SRAM-based FPGA for voltage scaling realization in the presence of process variations.
CODES+ISSS 2011: 257-266 |
| 7 | | Shahin Golshan,
Love Singhal,
Eli Bozorgzadeh:
Process variation aware system-level load assignment for total energy minimization using stochastic ordering.
ISQED 2011: 566-571 |
| 6 | | Houman Homayoun,
Avesta Sasan,
Alexander V. Veidenbaum,
Hsin-Cheng Yao,
Shahin Golshan,
Payam Heydari:
MZZ-HVS: Multiple Sleep Modes Zig-Zag Horizontal and Vertical Sleep Transistor Sharing to Reduce Leakage Power in On-Chip SRAM Peripheral Circuits.
IEEE Trans. VLSI Syst. 19(12): 2303-2316 (2011) |
| 5 | | Shahin Golshan,
Hessam Kooti,
Elaheh Bozorgzadeh:
SEU-Aware High-Level Data Path Synthesis and Layout Generation on SRAM-Based FPGAs.
IEEE Trans. on CAD of Integrated Circuits and Systems 30(6): 829-840 (2011) |
| 2010 |
|---|
| 4 | | Shahin Golshan,
Eli Bozorgzadeh,
Benjamin Carrión Schäfer,
Kazutoshi Wakabayashi,
Houman Homayoun,
Alexander V. Veidenbaum:
Exploiting power budgeting in thermal-aware dynamic placement for reconfigurable systems.
ISLPED 2010: 49-54 |
| 3 | | Houman Homayoun,
Shahin Golshan,
Eli Bozorgzadeh,
Alexander V. Veidenbaum,
Fadi J. Kurdahi:
Post-synthesis sleep transistor insertion for leakage power optimization in clock tree networks.
ISQED 2010: 499-507 |
| 2009 |
|---|
| 2 | | Shahin Golshan,
Eli Bozorgzadeh:
SEU-aware resource binding for modular redundancy based designs on FPGAs.
DATE 2009: 1124-1129 |
| 2007 |
|---|
| 1 | | Shahin Golshan,
Elaheh Bozorgzadeh:
Single-Event-Upset (SEU) Awareness in FPGA Routing.
DAC 2007: 330-333 |
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