 | 2009 |
|---|
| 8 |       | Peiyi Zhao,
Jason McNeely,
Pradeep Kumar Golconda,
Soujanya Venigalla,
Nan Wang,
Magdy A. Bayoumi,
Weidong Kuang,
Luke Downey:
Low-Power Clocked-Pseudo-NMOS Flip-Flop for Level Conversion in Dual Supply Systems.
IEEE Trans. VLSI Syst. 17(9): 1196-1202 (2009) |
| 2007 |
|---|
| 7 | | Peiyi Zhao,
Jason McNeely,
Magdy A. Bayoumi,
Pradeep Kumar Golconda,
Weidong Kuang:
A Low Power Domino with Differential-Controlled-Keeper.
ISCAS 2007: 1625-1628 |
| 6 | | Peiyi Zhao,
Jason McNeely,
Pradeep Golconda,
Magdy A. Bayoumi,
Robert A. Barcenas,
Weidong Kuang:
Low-Power Clock Branch Sharing Double-Edge Triggered Flip-Flop.
IEEE Trans. VLSI Syst. 15(3): 338-345 (2007) |
| 5 | | Walid Elgharbawy,
Pradeep Golconda,
Abdelhamid G. Moursy,
Magdy A. Bayoumi:
Novel Adaptive Body Biasing Techniques for Energy Efficient Subthreshold CMOS Circuits.
J. Low Power Electronics 3(2): 175-188 (2007) |
| 2005 |
|---|
| 4 | | Walid Elgharbawy,
Pradeep Golconda,
Magdy A. Bayoumi:
Noise-tolerant high fan-in dynamic CMOS circuit design.
ACM Great Lakes Symposium on VLSI 2005: 134-137 |
| 3 | | Walid Elgharbawy,
Pradeep Golconda,
Ashok Kumar,
Magdy Bayoumi:
A new gate-level body biasing technique for PMOS transistors in subthreshold CMOS circuits.
ISCAS (5) 2005: 4697-4700 |
| 2004 |
|---|
| 2 |  | Peiyi Zhao,
Pradeep Kumar Golconda,
Magdy Bayoumi:
Contention reduced/conditional discharge flip-flops for level conversion in CVS systems.
ISCAS (2) 2004: 669-672 |
| 1 | | Peiyi Zhao,
Pradeep Kumar Golconda,
C. Archana,
Magdy A. Bayoumi:
A Double-Edge Implicit-Pulsed Level Convert Flip-Flop.
ISVLSI 2004: 141-144 |
Data released under the ODC-BY 1.0 license — See also our legal information page