Sandeep Kumar Goel

	2012
33		Erik Jan Marinissen, Gilbert Vandling, Sandeep Kumar Goel, Friedrich Hapke, Jason Rivers, Nikolaus Mittermaier, Swapnil Bahl: EDA solutions to new-defect detection in advanced process technologies. DATE 2012: 123-128
	2011
32		Sergej Deutsch, Vivek Chickermane, Brion L. Keller, Subhasish Mukherjee, Mario H. Konijnenburg, Erik Jan Marinissen, Sandeep Kumar Goel: Automation of 3D-DfT Insertion. Asian Test Symposium 2011: 395-400
31		Chun-Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng-Wen Wu: Multi-visit TAMs to Reduce the Post-Bond Test Length of 2.5D-SICs with a Passive Silicon Interposer Base. Asian Test Symposium 2011: 451-456
30		Chun-Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng-Wen Wu: DfT Architecture for 3D-SICs with Multiple Towers. European Test Symposium 2011: 51-56
29		Chun-Chuan Chi, Erik Jan Marinissen, Sandeep Kumar Goel, Cheng-Wen Wu: Post-bond testing of 2.5D-SICs and 3D-SICs containing a passive silicon interposer base. ITC 2011: 1-10
28		Brandon Noia, Krishnendu Chakrabarty, Sandeep Kumar Goel, Erik Jan Marinissen, Jouke Verbree: Test-Architecture Optimization and Test Scheduling for TSV-Based 3-D Stacked ICs. IEEE Trans. on CAD of Integrated Circuits and Systems 30(11): 1705-1718 (2011)
	2010
27		Sandeep Kumar Goel, Krishnendu Chakrabarty, Mahmut Yilmaz, Ke Peng, Mohammad Tehranipoor: Circuit Topology-Based Test Pattern Generation for Small-Delay Defects. Asian Test Symposium 2010: 307-312
26		Brandon Noia, Sandeep Kumar Goel, Krishnendu Chakrabarty, Erik Jan Marinissen, Jouke Verbree: Test-architecture optimization for TSV-based 3D stacked ICs. European Test Symposium 2010: 24-29
	2009
25		Narendra Devta-Prasanna, Sandeep Kumar Goel, Arun Gunda, Mark Ward, P. Krishnamurthy: Accurate measurement of small delay defect coverage of test patterns. ITC 2009: 1-10
24		Sandeep Kumar Goel, Narendra Devta-Prasanna, Mark Ward: Comparing the effectiveness of deterministic bridge fault and multiple-detect stuck fault patterns for physical bridge defects: A simulation and silicon study. ITC 2009: 1-10
23		Sandeep Kumar Goel, Narendra Devta-Prasanna, Ritesh P. Turakhia: Effective and Efficient Test Pattern Generation for Small Delay Defect. VTS 2009: 111-116
22		Ritesh P. Turakhia, Mark Ward, Sandeep Kumar Goel, Brady Benware: Bridging DFM Analysis and Volume Diagnostics for Yield Learning - A Case Study. VTS 2009: 167-172
21		Sandeep Kumar Goel, Erik Jan Marinissen, Anuja Sehgal, Krishnendu Chakrabarty: Testing of SoCs with Hierarchical Cores: Common Fallacies, Test Access Optimization, and Test Scheduling. IEEE Trans. Computers 58(3): 409-423 (2009)
	2007
20		Sandeep Kumar Goel, Erik Jan Marinissen: On-Chip Test Infrastructure Design for Optimal Multi-Site Testing of System Chips CoRR abs/0710.4687: (2007)
19		Sandeep Kumar Goel, Maurice Meijer, José Pineda de Gyvez: Efficient testing and diagnosis of faulty power switches in SOCs. IET Computers & Digital Techniques 1(3): 230-236 (2007)
	2006
18		Harald P. E. Vranken, Sandeep Kumar Goel, Andreas Glowatz, Jürgen Schlöffel, Friedrich Hapke: Fault detection and diagnosis with parity trees for space compaction of test responses. DAC 2006: 1095-1098
17		Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty: Hierarchy-aware and area-efficient test infrastructure design for core-based system chips. DATE 2006: 285-290
16		Sandeep Kumar Goel, Maurice Meijer, José Pineda de Gyvez: Testing and Diagnosis of Power Switches in SOCs. European Test Symposium 2006: 145-150
	2005
15		Sandeep Kumar Goel, Erik Jan Marinissen: On-Chip Test Infrastructure Design for Optimal Multi-Site Testing of System Chips. DATE 2005: 44-49
	2004
14		Bart Vermeulen, Mohammad Zalfany Urfianto, Sandeep Kumar Goel: Automatic generation of breakpoint hardware for silicon debug. DAC 2004: 514-517
13		Sandeep Kumar Goel, Kuoshu Chiu, Erik Jan Marinissen, Toan Nguyen, Steven Oostdijk: Test Infrastructure Design for the Nexperia? Home Platform PNX8550 System Chip. DATE 2004: 108-113
12		Anuja Sehgal, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty: IEEE P1500-Compliant Test Wrapper Design for Hierarchical Cores. ITC 2004: 1203-1212
	2003
11		Sandeep Kumar Goel, Erik Jan Marinissen: Layout-Driven SOC Test Architecture Design for Test Time and Wire Length Minimization. DATE 2003: 10738-10741
10		Sandeep Kumar Goel, Erik Jan Marinissen: SOC test architecture design for efficient utilization of test bandwidth. ACM Trans. Design Autom. Electr. Syst. 8(4): 399-429 (2003)
9		Sandeep Kumar Goel, Bart Vermeulen: Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips. J. Electronic Testing 19(4): 407-416 (2003)
8		Sandeep Kumar Goel, Erik Jan Marinissen: A Test Time Reduction Algorithm for Test Architecture Design for Core-Based System Chips. J. Electronic Testing 19(4): 425-435 (2003)
	2002
7		Sandeep Kumar Goel, Bart Vermeulen: Hierarchical Data Invalidation Analysis for Scan-Based Debug on Multiple-Clock System Chips. ITC 2002: 1103-1110
6		Vikram Iyengar, Sandeep Kumar Goel, Erik Jan Marinissen, Krishnendu Chakrabarty: Test Resource Optimization for Multi-Site Testing of SOCs Under ATE Memory Depth Constraints. ITC 2002: 1159-1168
5		Sandeep Kumar Goel, Erik Jan Marinissen: Effective and Efficient Test Architecture Design for SOCs. ITC 2002: 529-538
4		Bart Vermeulen, Tom Waayers, Sandeep Kumar Goel: Core-Based Scan Architecture for Silicon Debug. ITC 2002: 638-647
3		Sandeep Kumar Goel, Erik Jan Marinissen: Cluster-Based Test Architecture Design for System-on-Chip. VTS 2002: 259-264
2		Bart Vermeulen, Sandeep Kumar Goel: Design for Debug: Catching Design Errors in Digital Chips. IEEE Design & Test of Computers 19(3): 37-45 (2002)
	2000
1		Yervant Zorian, Erik Jan Marinissen, Maurice Lousberg, Sandeep Kumar Goel: Wrapper design for embedded core test. ITC 2000: 911-920

Coauthor Index

1	Swapnil Bahl	[33]
2	Brady Benware	[22]
3	Krishnendu Chakrabarty	[6] [12] [17] [21] [26] [27] [28]
4	Chun-Chuan Chi	[29] [30] [31]
5	Vivek Chickermane	[32]
6	Kuoshu Chiu	[13]
7	Sergej Deutsch	[32]
8	Narendra Devta-Prasanna	[23] [24] [25]
9	Andreas Glowatz	[18]
10	Arun Gunda	[25]
11	José Pineda de Gyvez	[16] [19]
12	Friedrich Hapke	[18] [33]
13	Vikram Iyengar	[6]
14	Brion L. Keller	[32]
15	Mario H. Konijnenburg (M. H. Konijnenburg)	[32]
16	P. Krishnamurthy	[25]
17	Maurice Lousberg	[1]
18	Erik Jan Marinissen	[1] [3] [5] [6] [8] [10] [11] [12] [13] [15] [17] [20] [21] [26] [28] [29] [30] [31] [32] [33]
19	Maurice Meijer	[16] [19]
20	Nikolaus Mittermaier	[33]
21	Subhasish Mukherjee	[32]
22	Toan Nguyen	[13]
23	Brandon Noia	[26] [28]
24	Steven Oostdijk	[13]
25	Ke Peng	[27]
26	Jason Rivers	[33]
27	Jürgen Schlöffel	[18]
28	Anuja Sehgal	[12] [17] [21]
29	Mohammad Tehranipoor	[27]
30	Ritesh P. Turakhia	[22] [23]
31	Mohammad Zalfany Urfianto	[14]
32	Gilbert Vandling	[33]
33	Jouke Verbree	[26] [28]
34	Bart Vermeulen	[2] [4] [7] [9] [14]
35	Harald P. E. Vranken	[18]
36	Tom Waayers	[4]
37	Mark Ward	[22] [24] [25]
38	Cheng-Wen Wu	[29] [30] [31]
39	Mahmut Yilmaz	[27]
40	Yervant Zorian	[1]

Colors in the list of coauthors

Last update Fri Jun 1 15:44:53 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page