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| 2012 | ||
|---|---|---|
| 183 | Peng Gao, Xinpeng Xing, Jan Craninckx, Georges G. E. Gielen: Design of an intrinsically-linear double-VCO-based ADC with 2nd-order noise shaping. DATE 2012: 1215-1220 | |
| 182 | Dimilri De Jonghe, Elie Maricau, Georges G. E. Gielen, Trent McConaghy, Bratislav Tasic, Haralampos-G. D. Stratigopoulos: Advances in variation-aware modeling, verification, and testing of analog ICs. DATE 2012: 1615-1620 | |
| 181 | Elie Maricau, Dimilri De Jonghe, Georges G. E. Gielen: Hierarchical analog circuit reliability analysis using multivariate nonlinear regression and active learning sample selection. DATE 2012: 745-750 | |
| 180 | Bo Liu, Jarir Messaoudi, Georges G. E. Gielen: A fast analog circuit yield estimation method for medium and high dimensional problems. DATE 2012: 751-756 | |
| 179 | Adi Xhakoni, David San Segundo Bello, Georges G. E. Gielen: Impact of TSV area on the dynamic range and frame rate performance of 3D-integrated image sensors. DATE 2012: 836-839 | |
| 178 | Carolina Mora Lopez, Dimiter Prodanov, Dries Braeken, Ivan Gligorijevic, Wolfgang Eberle, Carmen Bartic, Robert Puers, Georges G. E. Gielen: A Multichannel Integrated Circuit for Electrical Recording of Neural Activity, With Independent Channel Programmability. IEEE Trans. Biomed. Circuits and Systems 6(2): 101-110 (2012) | |
| 2011 | ||
| 177 | Bo Liu, Ying He, Patrick Reynaert, Georges G. E. Gielen: Global optimization of integrated transformers for high frequency microwave circuits using a Gaussian process based surrogate model. DATE 2011: 1101-1106 | |
| 176 | Elie Maricau, Georges G. E. Gielen: Stochastic circuit reliability analysis. DATE 2011: 1285-1290 | |
| 175 | Georges G. E. Gielen, Elie Maricau, Peter H. N. De Wit: Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation. DATE 2011: 1474-1479 | |
| 174 | Carolina Mora Lopez, Silke Musa, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle: Systematic design of a programmable low-noise CMOS neural interface for cell activity recording. DATE 2011: 818-823 | |
| 173 | Elie Maricau, Georges G. E. Gielen: Transistor aging-induced degradation of analog circuits: Impact analysis and design guidelines. ESSCIRC 2011: 243-246 | |
| 172 | Pieter De Wit, Georges G. E. Gielen: A failure-resilient xDSL line driver with on-chip degradation monitor. ESSCIRC 2011: 247-250 | |
| 171 | Hans Danneels, Kristof Coddens, Georges G. E. Gielen: A fully-digital, 0.3V, 270 nW capacitive sensor interface without external references. ESSCIRC 2011: 287-290 | |
| 170 | Dimitri de Jonghe, Georges G. E. Gielen: Efficient analytical macromodeling of large analog circuits by Transfer Function Trajectories. ICCAD 2011: 91-94 | |
| 169 | Simon Vanden Bussche, Pieter De Wit, Elie Maricau, Georges G. E. Gielen: Impact analysis of stochastic transistor aging on current-steering DACs in 32nm CMOS. ICECS 2011: 161-164 | |
| 168 | Wim Dehaene, Georges G. E. Gielen, Geert Deconinck, Johan Driesen, Marc Moonen, Bart Nauwelaers, C. Van Hoof, Patrick Wambacq: Circuits and systems engineering education through interdisciplinary team-based design projects. ISCAS 2011: 1195-1198 | |
| 167 | Carolina Mora Lopez, Dries Braeken, Carmen Bartic, Robert Puers, Georges G. E. Gielen, Wolfgang Eberle: A 16-channel low-noise programmable system for the recording of neural signals. ISCAS 2011: 1451-1454 | |
| 166 | Bo Liu, Murat Pak, Xuezhi Zheng, Georges G. E. Gielen: A novel operating-point driven method for the sizing of analog IC. ISCAS 2011: 781-784 | |
| 165 | Trent McConaghy, Pieter Palmers, Michiel Steyaert, Georges G. E. Gielen: Trustworthy Genetic Programming-Based Synthesis of Analog Circuit Topologies Using Hierarchical Domain-Specific Building Blocks. IEEE Trans. Evolutionary Computation 15(4): 557-570 (2011) | |
| 164 | Bo Liu, Dixian Zhao, Patrick Reynaert, Georges G. E. Gielen: Synthesis of Integrated Passive Components for High-Frequency RF ICs Based on Evolutionary Computation and Machine Learning Techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 30(10): 1458-1468 (2011) | |
| 163 | Bo Liu, Francisco V. Fernández, Georges G. E. Gielen: Efficient and Accurate Statistical Analog Yield Optimization and Variation-Aware Circuit Sizing Based on Computational Intelligence Techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 30(6): 793-805 (2011) | |
| 162 | Bart De Vuyst, Pieter Rombouts, Georges G. E. Gielen: A Rigorous Approach to the Robust Design of Continuous-Time Sigma-Delta Modulators. IEEE Trans. on Circuits and Systems 58-I(12): 2829-2837 (2011) | |
| 161 | Athanasios Stefanou, Georges G. E. Gielen: A Volterra Series Nonlinear Model of the Sampling Distortion in Flash ADCs Due to Substrate Noise Coupling. IEEE Trans. on Circuits and Systems 58-II(12): 877-881 (2011) | |
| 2010 | ||
| 160 | Elie Maricau, Georges G. E. Gielen: Variability-aware reliability simulation of mixed-signal ICs with quasi-linear complexity. DATE 2010: 1094-1099 | |
| 159 | Bo Liu, Francisco V. Fernández, Georges G. E. Gielen: An accurate and efficient yield optimization method for analog circuits based on computing budget allocation and memetic search technique. DATE 2010: 1106-1111 | |
| 158 | Georges G. E. Gielen, Elie Maricau, Peter H. N. De Wit: Design automation towards reliable analog integrated circuits. ICCAD 2010: 248-251 | |
| 157 | Bo Liu, Francisco V. Fernández, Qingfu Zhang, Murat Pak, Suha Sipahi, Georges G. E. Gielen: An enhanced MOEA/D-DE and its application to multiobjective analog cell sizing. IEEE Congress on Evolutionary Computation 2010: 1-7 | |
| 156 | Pieter De Wit, Georges G. E. Gielen: Efficient simulation model for DAC dynamic properties. ISCAS 2010: 2896-2899 | |
| 155 | Wouter Volkaerts, Bart Marien, Hans Danneels, Valentijn De Smedt, Patrick Reynaert, Wim Dehaene, Georges G. E. Gielen: A 0.5 V-1.4 V supply-independent frequency-based analog-to-digital converter with fast start-up time for wireless sensor networks. ISCAS 2010: 3096-3099 | |
| 154 | Zheng Li, Georges G. E. Gielen: Energy Normalized Correlation for Signal Acquisition in Power-Control-Absent UWB Networks. IEEE Communications Letters 14(7): 653-655 (2010) | |
| 153 | Elie Maricau, Georges G. E. Gielen: Efficient Variability-Aware NBTI and Hot Carrier Circuit Reliability Analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 29(12): 1884-1893 (2010) | |
| 152 | Bart De Vuyst, Pieter Rombouts, Jeroen De Maeyer, Georges G. E. Gielen: The Nyquist Criterion: A Useful Tool for the Robust Design of Continuous-Time SigmaDelta Modulators. IEEE Trans. on Circuits and Systems 57-II(6): 416-420 (2010) | |
| 151 | Nick Van Helleputte, Marian Verhelst, Wim Dehaene, Georges G. E. Gielen: A Reconfigurable, 130 nm CMOS 108 pJ/pulse, Fully Integrated IR-UWB Receiver for Communication and Precise Ranging. J. Solid-State Circuits 45(1): 69-83 (2010) | |
| 150 | Soheil Radiom, Majid Baghaei Nejad, Karim Aghdam, Guy A. E. Vandenbosch, Li-Rong Zheng, Georges G. E. Gielen: Far-Field On-Chip Antennas Monolithically Integrated in a Wireless-Powered 5.8-GHz Downlink/UWB Uplink RFID Tag in 0.18- μħbox m Standard CMOS. J. Solid-State Circuits 45(9): 1746-1758 (2010) | |
| 2009 | ||
| 149 | Geoffrey Ying, Andreas Kuehlmann, Kenneth S. Kundert, Georges G. E. Gielen, Eric Grimme, Martin O'Leary, Sandeep Tare, Warren Wong: Guess, solder, measure, repeat: how do I get my mixed-signal chip right? DAC 2009: 520-521 | |
| 148 | Wolfgang Eberle, Ashwin S. Mecheri, Thi Kim Thoa Nguyen, Georges G. E. Gielen, Raymond Campagnolo, Alison Burdett, Chris Toumazou, Bart Volckaerts: Health-care electronics The market, the challenges, the progress. DATE 2009: 1030-1034 | |
| 147 | Elie Maricau, Georges G. E. Gielen: Efficient reliability simulation of analog ICs including variability and time-varying stress. DATE 2009: 1238-1241 | |
| 146 | Yi Ke, Jan Craninckx, Georges G. E. Gielen: A design methodology for fully reconfigurable Delta-Sigma data converters. DATE 2009: 1379-1384 | |
| 145 | Pieter Palmers, Trent McConaghy, Michiel Steyaert, Georges G. E. Gielen: Massively multi-topology sizing of analog integrated circuits. DATE 2009: 706-711 | |
| 144 | Georges G. E. Gielen: Design tools and circuit solutions for degradation-resilient analog circuits in nanometer CMOS. DDECS 2009: 1 | |
| 143 | Ivick Guerra-Gómez, Esteban Tlelo-Cuautle, Trent McConaghy, Georges G. E. Gielen: Optimizing current conveyors by evolutionary algorithms including differential evolution. ICECS 2009: 259-262 | |
| 142 | Bo Liu, Francisco V. Fernández, Dimilri De Jonghe, Georges G. E. Gielen: Less expensive and high quality stopping criteria for MC-based analog IC yield optimization. ICECS 2009: 267-270 | |
| 141 | Bo Liu, Francisco V. Fernández, Georges G. E. Gielen: Fuzzy selection based differential evolution algorithm for analog cell sizing capturing imprecise human intentions. IEEE Congress on Evolutionary Computation 2009: 622-629 | |
| 140 | Elie Maricau, Georges G. E. Gielen: A methodology for measuring transistor ageing effects towards accurate reliability simulation. IOLTS 2009: 21-26 | |
| 139 | Athanasios Stefanou, Georges G. E. Gielen: Prediction of Non-uniform Sampling Distortion Due to Substrate Noise Coupling in Regenerative Comparators. ISCAS 2009: 968-971 | |
| 138 | Majid Baghaei Nejad, David S. Mendoza, Zhuo Zou, Soheil Radiom, Georges G. E. Gielen, Li-Rong Zheng, Hannu Tenhunen: A remote-powered RFID tag with 10Mb/s UWB uplink and -18.5dBm sensitivity UHF downlink in 0.18µm CMOS. ISSCC 2009: 198-199 | |
| 137 | Marian Verhelst, Nick Van Helleputte, Georges G. E. Gielen, Wim Dehaene: A reconfigurable, 0.13µm CMOS 110pJ/pulse, fully integrated IR-UWB receiver for communication and sub-cm ranging. ISSCC 2009: 250-251 | |
| 136 | Bo Liu, Francisco V. Fernández, Georges G. E. Gielen, R. Castro-López, Elisenda Roca: A memetic approach to the automatic design of high-performance analog integrated circuits. ACM Trans. Design Autom. Electr. Syst. 14(3): (2009) | |
| 135 | Trent McConaghy, Georges G. E. Gielen: Globally Reliable Variation-Aware Sizing of Analog Integrated Circuits via Response Surfaces and Structural Homotopy. IEEE Trans. on CAD of Integrated Circuits and Systems 28(11): 1627-1640 (2009) | |
| 134 | Trent McConaghy, Georges G. E. Gielen: Template-Free Symbolic Performance Modeling of Analog Circuits via Canonical-Form Functions and Genetic Programming. IEEE Trans. on CAD of Integrated Circuits and Systems 28(8): 1162-1175 (2009) | |
| 133 | Trent McConaghy, Pieter Palmers, Michiel Steyaert, Georges G. E. Gielen: Variation-Aware Structural Synthesis of Analog Circuits via Hierarchical Building Blocks and Structural Homotopy. IEEE Trans. on CAD of Integrated Circuits and Systems 28(9): 1281-1294 (2009) | |
| 132 | Zheng Li, Wim Dehaene, Georges G. E. Gielen: A 3-tier UWB-based indoor localization system for ultra-low-power sensor networks. IEEE Transactions on Wireless Communications 8(6): 2813-2818 (2009) | |
| 131 | Ewout Martens, Georges G. E. Gielen: ANTIGONE: Top-down creation of analog-to-digital converter architectures. Integration 42(1): 10-23 (2009) | |
| 2008 | ||
| 130 | Georges G. E. Gielen, Peter H. N. De Wit, Elie Maricau, J. Loeckx, J. Martín-Martínez, Ben Kaczer, Guido Groeseneken, R. Rodríguez, M. Nafría: Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies. DATE 2008: 1322-1327 | |
| 129 | David Binkley, Helmut E. Graeb, Georges G. E. Gielen, Jaijeet S. Roychowdhury: From Transistor to PLL - Analogue Design and EDA Methods. DATE 2008 | |
| 128 | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert: Automated extraction of expert knowledge in analog topology selection and sizing. ICCAD 2008: 392-395 | |
| 127 | Peng Gao, Trent McConaghy, Georges G. E. Gielen: Importance sampled circuit learning ensembles for robust analog IC design. ICCAD 2008: 396-399 | |
| 126 | Peng Gao, Trent McConaghy, Georges G. E. Gielen: ISCLEs: Importance Sampled Circuit Learning Ensembles for Trustworthy Analog Circuit Topology Synthesis. ICES 2008: 11-21 | |
| 125 | Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen: A low-power mixing DAC IR-UWB-receiver. ISCAS 2008: 2697-2700 | |
| 124 | Minghu Jiang, Georges G. E. Gielen: Analysis of quantization effects on high-order function neural networks. Appl. Intell. 28(1): 51-67 (2008) | |
| 123 | Yi Ke, Jan Craninckx, Georges G. E. Gielen: A Design Approach for Power-Optimized Fully Reconfigurable Delta Sigma A/D Converter for 4G Radios. IEEE Trans. on Circuits and Systems 55-II(3): 229-233 (2008) | |
| 122 | Ewout Martens, Georges G. E. Gielen: Classification of analog synthesis tools based on their architecture selection mechanisms. Integration 41(2): 238-252 (2008) | |
| 121 | Elie Maricau, Peter H. N. De Wit, Georges G. E. Gielen: An analytical model for hot carrier degradation in nanoscale CMOS suitable for the simulation of degradation in analog IC applications. Microelectronics Reliability 48(8-9): 1576-1580 (2008) | |
| 2007 | ||
| 120 | Georges G. E. Gielen: 2007 International Conference on Computer-Aided Design (ICCAD'07), November 5-8, 2007, San Jose, CA, USA IEEE 2007 | |
| 119 | Georges G. E. Gielen: Future trends for wireless communication frontends in nanometer CMOS. ACM Great Lakes Symposium on VLSI 2007: 600-605 | |
| 118 | Georges G. E. Gielen: Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies. ASP-DAC 2007: 432-437 | |
| 117 | Trent McConaghy, Pieter Palmers, Georges G. E. Gielen, Michiel Steyaert: Simultaneous Multi-Topology Multi-Objective Sizing Across Thousands of Analog Circuit Topologies. DAC 2007: 944-947 | |
| 116 | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen: An efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection. DATE 2007: 81-86 | |
| 115 | Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: Scalable Gate-Level Models for Power and Timing Analysis. ISCAS 2007: 2938-2941 | |
| 114 | Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen: CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming CoRR abs/0710.4630: (2007) | |
| 113 | Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich: Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? CoRR abs/0710.4709: (2007) | |
| 112 | Georges G. E. Gielen, Donatella Sciuto: Guest Editorial [intro. to the special issue on the 2006 IEEE/ACM Design, Automation and Test in Europe Conference]. IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 405-407 (2007) | |
| 2006 | ||
| 111 | Georges G. E. Gielen: Proceedings of the Conference on Design, Automation and Test in Europe, DATE 2006, Munich, Germany, March 6-10, 2006 European Design and Automation Association, Leuven, Belgium 2006 | |
| 110 | Georges G. E. Gielen: Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, DATE 2006, Munich, Germany, March 6-10, 2006 European Design and Automation Association, Leuven, Belgium 2006 | |
| 109 | Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen: Hierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard. DAC 2006: 25-30 | |
| 108 | Trent McConaghy, Georges G. E. Gielen: Double-strength CAFFEINE: fast template-free symbolic modeling of analog circuits via implicit canonical form functions and explicit introns. DATE 2006: 269-274 | |
| 107 | Ewout Martens, Georges G. E. Gielen: Top-down heterogeneous synthesis of analog and mixed-signal systems. DATE 2006: 275-280 | |
| 106 | Ewout Martens, Georges G. E. Gielen: Generic Behavioral Modeling of Analog and Mixed-Signal Systems. FDL 2006: 15-23 | |
| 105 | Trent McConaghy, Georges G. E. Gielen: Canonical form functions as a simple means for genetic programming to evolve human-interpretable functions. GECCO 2006: 855-862 | |
| 104 | Trent McConaghy, Georges G. E. Gielen: Automation in mixed-signal design: challenges and solutions in the wake of the nano era. ICCAD 2006: 461-463 | |
| 103 | Ewout Martens, Georges G. E. Gielen: A behavioral model of sampled-data systems in the phase-frequency transfer domain for architectural exploration of transceivers. ISCAS 2006 | |
| 102 | Alkis A. Hatzopoulos, Stefanos Stefanou, Georges G. E. Gielen, Dominique Schreurs: Assessment of parameter extraction methods for integrated inductor design and model validation. ISCAS 2006 | |
| 101 | Mustafa Badaroglu, Geert Van der Plas, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: SWAN: high-level simulation methodology for digital substrate noise generation. IEEE Trans. VLSI Syst. 14(1): 23-33 (2006) | |
| 100 | Ewout Martens, Georges G. E. Gielen: Analyzing continuous-time Delta-Sigma-Modulators with generic behavioral models. IEEE Trans. on CAD of Integrated Circuits and Systems 25(5): 924-932 (2006) | |
| 99 | Mustafa Badaroglu, Kris Tiri, Geert Van der Plas, Piet Wambacq, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1146-1154 (2006) | |
| 2005 | ||
| 98 | Huiying Yang, Mukesh Ranjan, Wim Verhaegen, Mengmeng Ding, Ranga Vemuri, Georges G. E. Gielen: Efficient symbolic sensitivity analysis of analog circuits using element-coefficient diagrams. ASP-DAC 2005: 230-235 | |
| 97 | Georges G. E. Gielen, Trent McConaghy, Tom Eeckelaert: Performance space modeling for hierarchical synthesis of analog integrated circuits. DAC 2005: 881-886 | |
| 96 | Tom Eeckelaert, Trent McConaghy, Georges G. E. Gielen: Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces. DATE 2005: 1070-1075 | |
| 95 | Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen: CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming. DATE 2005: 1082-1087 | |
| 94 | Ewout Martens, Georges G. E. Gielen: Time-Domain Simulation of Sampled Weakly Nonlinear Systems Using Analytical Integration and Orthogonal Polynomial Series. DATE 2005: 120-125 | |
| 93 | Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich: Analog and Digital Circuit Design in 65 nm CMOS: End of the Road? DATE 2005: 36-42 | |
| 92 | Trent McConaghy, Georges G. E. Gielen: Analysis of simulation-driven numerical performance modeling techniques for application to analog circuit optimization. ISCAS (2) 2005: 1298-1301 | |
| 91 | Ewout Martens, Georges G. E. Gielen: Behavioral modeling and simulation of weakly nonlinear sampled-data systems. ISCAS (3) 2005: 2247-2250 | |
| 90 | Trent McConaghy, Georges G. E. Gielen: IBMG: interpretable behavioral model generator for nonlinear analog circuits via canonical form functions and genetic programming. ISCAS (5) 2005: 5170-5173 | |
| 89 | Didier Van Reeth, Georges G. E. Gielen: A CAD Platform for Sensor Interfaces in Low-Power Applications. PATMOS 2005: 374-381 | |
| 88 | Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: Digital ground bounce reduction by supply current shaping and clock frequency Modulation. IEEE Trans. on CAD of Integrated Circuits and Systems 24(1): 65-76 (2005) | |
| 2004 | ||
| 87 | Ewout Martens, Georges G. E. Gielen: High-level modeling of continuous-time Delta-Sigma A/D-converters using formal models. ASP-DAC 2004: 51-56 | |
| 86 | Geert Van der Plas, Mustafa Badaroglu, Gerd Vandersteen, Petr Dobrovolný, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: High-level simulation of substrate noise in high-ohmic substrates with interconnect and supply effects. DAC 2004: 854-859 | |
| 85 | Ewout Martens, Georges G. E. Gielen: A Phase-Frequency Transfer Description of Analog and Mixed-Signal Front-End Architectures for System-Level Design. DATE 2004: 436-441 | |
| 84 | Tholom Kiely, Georges G. E. Gielen: Performance Modeling of Analog Integrated Circuits Using Least-Squares Support Vector Machines. DATE 2004: 448-453 | |
| 83 | Mukesh Ranjan, Wim Verhaegen, Anuradha Agarwal, Hemanth Sampath, Ranga Vemuri, Georges G. E. Gielen: Fast, Layout-Inclusive Analog Circuit Synthesis using Pre-Compiled Parasitic-Aware Symbolic Performance Models. DATE 2004: 604-609 | |
| 82 | Mustafa Badaroglu, Piet Wambacq, Geert Van der Plas, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: Digital Ground Bounce Reduction by Phase Modulation of the Clock. DATE 2004: 88-93 | |
| 81 | Tao Chen, Georges G. E. Gielen: Modelling of the impact of the current source output impedance on the SFDR of current-steering CMOS D/A converters. ISCAS (1) 2004: 293-296 | |
| 80 | João Ramos, Kenneth Francken, Georges G. E. Gielen, Michiel Steyaert: Knowledge- and optimization-based design of RF power amplifiers. ISCAS (1) 2004: 629-632 | |
| 79 | Minghu Jiang, Georges G. E. Gielen: Backpropagation Analysis of the Limited Precision on High-Order Function Neural Networks. ISNN (1) 2004: 305-310 | |
| 78 | Minghu Jiang, Dafan Liu, Beixing Deng, Georges G. E. Gielen: A Bayesian Classifier by Using the Adaptive Construct Algorithm of the RBF Networks. ISNN (1) 2004: 876-881 | |
| 77 | Georges G. E. Gielen, Kenneth Francken, Ewout Martens, Martin Vogels: An analytical integration method for the simulation of continuous-time /spl Delta//spl Sigma/ modulators. IEEE Trans. on CAD of Integrated Circuits and Systems 23(3): 389-399 (2004) | |
| 2003 | ||
| 76 | Martin Vogels, Georges G. E. Gielen: Architectural selection of A/D converters. DAC 2003: 974-977 | |
| 75 | Ewout Martens, Georges G. E. Gielen: A Model of Computation for Continuous-Time ?-? Modulators. DATE 2003: 10162-10167 | |
| 74 | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Time-Varying, Frequency-Domain Modeling and Analysis of Phase-Locked Loops with Sampling Phase-Frequency Detectors. DATE 2003: 10238-10243 | |
| 73 | Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Generalized Posynomial Performance Modeling. DATE 2003: 10250-10255 | |
| 72 | Bart De Smedt, Georges G. E. Gielen: HOLMES: Capturing the Yield-Optimized Design Space Boundaries of Analog and RF Integrated Circuits. DATE 2003: 10256-10263 | |
| 71 | Wolfgang Eberle, Gerd Vandersteen, Piet Wambacq, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: Behavioral Modeling and Simulation of a Mixed Analog/Digital Automatic Gain Control Loop in a 5 GHz WLAN Receiver. DATE 2003: 10642-10649 | |
| 70 | Martin Vogels, Georges G. E. Gielen: Figure of Merit Based Selection of A/D Converters. DATE 2003: 11090-11091 | |
| 69 | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: A Generalized Method for Computing Oscillator Phase Noise Spectra. ICCAD 2003: 247-250 | |
| 68 | Tao Chen, Georges G. E. Gielen: Analysis of the dynamic SFDR property of high-accuracy current-steering D/A converters. ISCAS (1) 2003: 973-976 | |
| 67 | Minghu Jiang, Georges G. E. Gielen, Bo Zhang, Zhensheng Luo: Fast Learning Algorithms for Feedforward Neural Networks. Appl. Intell. 18(1): 37-54 (2003) | |
| 66 | H. Alan Mantooth, Georges G. E. Gielen: Guest editorial. IEEE Trans. on CAD of Integrated Circuits and Systems 22(2): 121-123 (2003) | |
| 65 | Bart De Smedt, Georges G. E. Gielen: WATSON: design space boundary exploration and model generation for analog and RFIC design. IEEE Trans. on CAD of Integrated Circuits and Systems 22(2): 213-224 (2003) | |
| 64 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 22(5): 517-534 (2003) | |
| 63 | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Behavioral modeling of (coupled) harmonic oscillators. IEEE Trans. on CAD of Integrated Circuits and Systems 22(8): 1017-1026 (2003) | |
| 62 | Kenneth Francken, Georges G. E. Gielen: A high-level simulation and synthesis environment for /spl Delta//spl Sigma/ modulators. IEEE Trans. on CAD of Integrated Circuits and Systems 22(8): 1049-1061 (2003) | |
| 61 | Minghu Jiang, Georges G. E. Gielen: The Effects of Quantization on Multi-Layer Feedforward Neural Networks. IJPRAI 17(4): 637-661 (2003) | |
| 2002 | ||
| 60 | Mustafa Badaroglu, Kris Tiri, Stéphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen: Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients. DAC 2002: 399-404 | |
| 59 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits. DAC 2002: 431-436 | |
| 58 | Ovidiu Bajdechi, Johan H. Huijsing, Georges G. E. Gielen: Optimal design of delta-sigma ADCs by design space exploration. DAC 2002: 443-448 | |
| 57 | Jan Vandenbussche, K. Uyttenhove, Erik Lauwers, Michiel Steyaert, Georges G. E. Gielen: Systematic design of a 200 MS/s 8-bit interpolating/averaging A/D converter. DAC 2002: 449-454 | |
| 56 | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Behavioral modeling of (coupled) harmonic oscillators. DAC 2002: 536-541 | |
| 55 | Kenneth Francken, Martin Vogels, Ewout Martens, Georges G. E. Gielen: DAISY-CT: A High-Level Simulation Tool for Continuous-Time Delta Sigma Modulators. DATE 2002: 1110 | |
| 54 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: A Fitting Approach to Generate Symbolic Expressions for Linear and Nonlinear Analog Circuit Performance Characteristics. DATE 2002: 268-273 | |
| 53 | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Constructing Symbolic Models for the Input/Output Behavior of Periodically Time-Varying Systems Using Harmonic Transfer Matrices. DATE 2002: 279-284 | |
| 52 | Jan Vandenbussche, Erik Lauwers, K. Uyttenhove, Michiel Steyaert, Georges G. E. Gielen: Systematic Design of a 200 Ms/S 8-bit Interpolating A/D Converter. DATE 2002: 357-361 | |
| 51 | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: On the difference between two widely publicized methods for analyzing oscillator phase behavior. ICCAD 2002: 229-233 | |
| 50 | Kenneth Francken, Martin Vogels, Ewout Martens, Georges G. E. Gielen: A behavioral simulation tool for continuous-time delta sigma modulators. ICCAD 2002: 234-239 | |
| 49 | Martin Vogels, Kenneth Francken, Ewout Martens, Georges G. E. Gielen: Efficient time-domain simulation of continuous-time Delta-Sigma A/D converters using analytical integration. ISCAS (4) 2002: 237-240 | |
| 48 | Francky Leyn, Erik Lauwers, Martin Vogels, Georges G. E. Gielen, Willy M. C. Sansen: Regression criteria and their application in different modeling cases. ISCAS (5) 2002: 85-8 | |
| 47 | Erik Lauwers, Georges G. E. Gielen: Power estimation methods for analog circuits for architectural exploration of integrated systems. IEEE Trans. VLSI Syst. 10(2): 155-162 (2002) | |
| 46 | Carl De Ranter, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: CYCLONE: automated design and layout of RF LC-oscillators. IEEE Trans. on CAD of Integrated Circuits and Systems 21(10): 1161-1170 (2002) | |
| 45 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Circuit simplification for the symbolic analysis of analogintegrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 395-407 (2002) | |
| 44 | Geert Van der Plas, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen: A layout synthesis methodology for array-type analog blocks. IEEE Trans. on CAD of Integrated Circuits and Systems 21(6): 645-661 (2002) | |
| 43 | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Symbolic modeling of periodically time-varying systems usingharmonic transfer matrices. IEEE Trans. on CAD of Integrated Circuits and Systems 21(9): 1011-1024 (2002) | |
| 42 | Minghu Jiang, Georges G. E. Gielen, Beixing Deng, Xiaoyan Zhu: A fast learning algorithm for time-delay neural networks. Inf. Sci. 148(1-4): 27-39 (2002) | |
| 41 | Minghu Jiang, Xiaoyan Zhu, Georges G. E. Gielen, Elliott Drábek, Ying Xia, Gang Tan, Ta Bao: Braille to print translations for Chinese. Information & Software Technology 44(2): 91-100 (2002) | |
| 40 | Georges G. E. Gielen: Editorial. Integration 33(1-2): 1-2 (2002) | |
| 2001 | ||
| 39 | Wim Verhaegen, Georges G. E. Gielen: Efficient DDD-based Symbolic Analysis of Large Linear Analog Circuits. DAC 2001: 139-144 | |
| 38 | Georges G. E. Gielen, Mike Sottak, Mike Murray, Linda Kaye, Maria del Mar Hershenson, Kenneth S. Kundert, Philippe Magarshack, Akria Matsuzawa, Ronald A. Rohrer, Ping Yang: Panel: When Will the Analog Design Flow Catch Up with Digital Methodology? DAC 2001: 419 | |
| 37 | Piet Vanassche, Georges G. E. Gielen, Willy M. C. Sansen: Efficient time-domain simulation of telecom frontends using a complex damped exponential signal model. DATE 2001: 169-175 | |
| 36 | Mustafa Badaroglu, Marc van Heijningen, Vincent Gravot, Stéphane Donnay, Hugo De Man, Georges G. E. Gielen, Marc Engels, Ivo Bolsens: High-level simulation of substrate noise generation from large digital circuits with multiple supplies. DATE 2001: 326-330 | |
| 35 | Georges G. E. Gielen, B. Sorensen, H. Casier, Philippe Magarshack, J. Rodriguez: Design challenges and emerging EDA solutions in mixed-signal IC design. DATE 2001: 694-695 | |
| 34 | Peter J. Vancorenland, Geert Van der Plas, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: A Layout-Aware Synthesis Methodology for RF Circuits. ICCAD 2001: 358- | |
| 33 | Domine Leenaerts, Rob A. Rutenbar, Georges G. E. Gielen: Embedded Tutorial: CAD Solutions and Outstanding Challenges for Mixed-Signal and RF IC Design. ICCAD 2001 | |
| 32 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Simulation-Based Automatic Generation of Signomial and Posynomial Performance Models for Analog Integrated Circuit Sizing. ICCAD 2001: 70-74 | |
| 31 | Geert Van der Plas, Geert Debyser, Francky Leyn, Koen Lampaert, Jan Vandenbussche, Georges G. E. Gielen, Willy M. C. Sansen, Petar Veselinovic, Domine Leenaerts: AMGIE-A synthesis environment for CMOS analog integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 20(9): 1037-1058 (2001) | |
| 2000 | ||
| 30 | Erik Lauwers, Georges G. E. Gielen, Koen Lampaert, Paolo Miliozzi: High-Level Design Case of a Switched-Capacitor Low-Pass Filter Using Verilog-A. BMAS 2000: 16-21 | |
| 29 | Martin Vogels, Bart De Smedt, Georges G. E. Gielen: Modeling and Simulation of a Sigma-Delta Digital to Analog Converter Using VHDL-AMS. BMAS 2000: 5-9 | |
| 28 | Carl De Ranter, B. De Muer, Geert Van der Plas, Peter J. Vancorenland, Michiel Steyaert, Georges G. E. Gielen, Willy M. C. Sansen: CYCLONE: automated design and layout of RF LC-oscillators. DAC 2000: 11-14 | |
| 27 | Geert Van der Plas, Jan Vandenbussche, Walter Daems, Antal van den Bosch, Georges G. E. Gielen, Willy M. C. Sansen: Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter. DAC 2000: 452-457 | |
| 26 | Stephan Ohr, Rob A. Rutenbar, Henry Chang, Georges G. E. Gielen, Rudolf Koch, Roy McGuffin, K. C. Murphy: Survival strategies for mixed-signal systems-on-chip (panel session). DAC 2000: 579-580 | |
| 25 | Peter J. Vancorenland, Carl De Ranter, Michiel Steyaert, Georges G. E. Gielen: Optimal RF design using smart evolutionary algorithms. DAC 2000: 7-10 | |
| 24 | Kenneth Francken, Peter J. Vancorenland, Georges G. E. Gielen: DAISY: A Simulation-Based High-Level Synthesis Tool for Delta-Sigma Modulators. ICCAD 2000: 188-192 | |
| 23 | Erik Lauwers, Georges G. E. Gielen: ACTIF: A High-Level Power Estimation Tool for Analog Continuous-Time-Filters. ICCAD 2000: 193-196 | |
| 1999 | ||
| 22 | Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: Circuit Complexity Reduction for Symbolic Analysis of Analog Integrated Circuits. DAC 1999: 958-963 | |
| 21 | Erik Lauwers, Georges G. E. Gielen: A Power Estimation Model for High-Speed CMOS A/D Converters. DATE 1999: 401-405 | |
| 20 | Kenneth Francken, Georges G. E. Gielen: Methodology for analog technology porting including performance tuning. ISCAS (1) 1999: 415-418 | |
| 1998 | ||
| 19 | Jan Vandenbussche, Stéphane Donnay, Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen: Hierarchical Top-Down Design of Analog Sensor Interfaces: From System-Level Specifications Down to Silicon. DATE 1998: 716-720 | |
| 18 | Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen: An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits. ICCAD 1998: 304-307 | |
| 17 | Geert Debyser, Georges G. E. Gielen: Efficient analog circuit synthesis with simultaneous yield and robustness optimization. ICCAD 1998: 308-311 | |
| 16 | Zhihua Wang, Georges G. E. Gielen, Willy M. C. Sansen: Probabilistic fault detection and the selection of measurements for analog integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 17(9): 862-872 (1998) | |
| 1997 | ||
| 15 | Stéphane Donnay, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts, W. van Bokhoven: High-level synthesis of analog sensor interface front-ends. ED&TC 1997: 56-60 | |
| 14 | Francky Leyn, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen: A behavioral signal path modeling methodology for qualitative insight in and efficient sizing of CMOS opamps. ICCAD 1997: 374-381 | |
| 13 | Wim Verhaegen, Geert Van der Plas, Georges G. E. Gielen: Automated test pattern generation for analog integrated circuits. VTS 1997: 296-301 | |
| 1996 | ||
| 12 | L. Richard Carley, Georges G. E. Gielen, Rob A. Rutenbar, Willy M. C. Sansen: Synthesis Tools for Mixed-Signal ICs: Progress on Frontend and Backend Strategies. DAC 1996: 298-303 | |
| 1995 | ||
| 11 | Koen Lampaert, Georges G. E. Gielen, Willy M. C. Sansen: Direct Performance-Driven Placement of Mismatch-Sensitive Analog Circuits. DAC 1995: 445-449 | |
| 10 | Jan Crols, Stéphane Donnay, Michiel Steyaert, Georges G. E. Gielen: A high-level design and optimization tool for analog RF receiver front-ends. ICCAD 1995: 550-553 | |
| 9 | Georges G. E. Gielen, Geert Debyser, Piet Wambacq, Koen Swings, Willy M. C. Sansen: Use of Symbolic Analysis in Analog Circuit Synthesis. ISCAS 1995: 2205-2208 | |
| 1994 | ||
| 8 | Stéphane Donnay, Koen Swings, Georges G. E. Gielen, Willy M. C. Sansen, Wim Kruiskamp, Domine Leenaerts: A Methodology for Analog Design Automation in Mixed-Signal ASICs. EDAC-ETC-EUROASIC 1994: 530-534 | |
| 7 | Georges G. E. Gielen, Zhihua Wang, Willy M. C. Sansen: Fault detection and input stimulus determination for the testing of analog integrated circuits based on power-supply current monitoring. ICCAD 1994: 495-498 | |
| 6 | Francisco V. Fernández, Piet Wambacq, Georges G. E. Gielen, Ángel Rodríguez-Vázquez, Willy M. C. Sansen: Symbolic Analysis of Large Analog Integrated Circuits by Approximation During Expression Generation. ISCAS 1994: 25-28 | |
| 5 | Zhihua Wang, Georges G. E. Gielen, Willy M. C. Sansen: A Novel Method for the Fault Detection of Analog Integrated Circuits. ISCAS 1994: 347-350 | |
| 4 | Francisco V. Fernández, Georges G. E. Gielen, Lawrence Huelsman, Agnieszka Konczykowska, Stefano Manetti, Willy M. C. Sansen, Jiri Vlach: Pleasures, Perils and Pitfalls of Symbolic Analysis. ISCAS 1994: 451-457 | |
| 1993 | ||
| 3 | Georges G. E. Gielen, Willy M. C. Sansen: Modeling of the Power-supply Interactions of CMOS Operational Amplifiers Using Symbolic Computation. ISCAS 1993: 1381-1384 | |
| 1991 | ||
| 2 | Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli, Georges G. E. Gielen, Paul R. Gray: A Behavioral Representation for Nyquist Rate A/D Converters. ICCAD 1991: 386-389 | |
| 1990 | ||
| 1 | Georges G. E. Gielen, Koen Swings, Willy M. C. Sansen: An intelligent design system for analogue integrated circuits. EURO-DAC 1990: 169-173 | |
Colors in the list of coauthors
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