 | 2010 |
|---|
| 8 |       | Heiner Giefers,
Marco Platzner:
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics.
ERSA 2010: 251-254 |
| 7 |  | Heiner Giefers,
Marco Platzner:
A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier.
FPL 2010: 223-228 |
| 2009 |
|---|
| 6 | | Heiner Giefers,
Marco Platzner:
Program-driven fine-grained power management for the reconfigurable mesh.
FPL 2009: 119-125 |
| 5 | | Heiner Giefers,
Marco Platzner:
ARMLang: A language and compiler for programming reconfigurable mesh many-cores.
IPDPS 2009: 1-8 |
| 2008 |
|---|
| 4 | | Heiner Giefers:
Reconfigurable many-cores with lean interconnect.
FPL 2008: 707-708 |
| 3 | | Heiner Giefers,
Marco Platzner:
Realizing reconfigurable mesh algorithms on softcore arrays.
ICSAMOS 2008: 41-48 |
| 2007 |
|---|
| 2 | | Heiner Giefers,
Marco Platzner:
A Many-core Implementation based on the Reconfigurable Mesh Model.
FPL 2007: 41-46 |
| 2006 |
|---|
| 1 | | Heiner Giefers,
Achim Rettberg:
Energy aware multiple clock domain scheduling for a bit-serial, self-timed architecture.
SBCCI 2006: 113-118 |
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