Enric Gibert

	2012
12		Demos Pavlou, Enric Gibert, Fernando Latorre, Antonio González: DDGacc: boosting dynamic DDG-based binary optimizations through specialized hardware support. VEE 2012: 159-168
	2011
11		Indu Bhagat, Enric Gibert, F. Jesús Sánchez, Antonio González: Global productiveness propagation: a code optimization technique to speculatively prune useless narrow computations. LCTES 2011: 161-170
	2009
10		Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González: Boosting single-thread performance in multi-core systems through fine-grain multi-threading. ISCA 2009: 474-483
9		Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González: Anaphase: A Fine-Grain Thread Decomposition Scheme for Speculative Multithreading. PACT 2009: 15-25
	2006
8		Enric Gibert, F. Jesús Sánchez, Antonio González: Instruction scheduling for a clustered VLIW processor with a word-interleaved cache. Concurrency and Computation: Practice and Experience 18(11): 1391-1411 (2006)
7		Alex Settle, Dan Connors, Enric Gibert, Antonio González: A dynamically reconfigurable cache for multithreaded processors. J. Embedded Computing 2(2): 221-233 (2006)
	2005
6		Enric Gibert, Jaume Abella, F. Jesús Sánchez, Xavier Vera, Antonio González: Variable-Based Multi-module Data Caches for Clustered VLIW Processors. IEEE PACT 2005: 207-217
5		Enric Gibert, F. Jesús Sánchez, Antonio González: Distributed Data Cache Designs for Clustered VLIW Processors. IEEE Trans. Computers 54(10): 1227-1241 (2005)
	2003
4		Enric Gibert, F. Jesús Sánchez, Antonio González: Local Scheduling Techniques for Memory Coherence in a Clustered VLIW Processor with a Distributed Data Cache. CGO 2003: 193-203
3		Enric Gibert, F. Jesús Sánchez, Antonio González: Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors. MICRO 2003: 315-325
	2002
2		Enric Gibert, F. Jesús Sánchez, Antonio González: An interleaved cache clustered VLIW processor. ICS 2002: 210-219
1		Enric Gibert, F. Jesús Sánchez, Antonio González: Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor. MICRO 2002: 123-133

Coauthor Index

1	Jaume Abella	[6]
2	Indu Bhagat	[11]
3	Josep M. Codina	[9] [10]
4	Daniel A. Connors (Dan Connors)	[7]
5	Antonio González	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
6	Fernando Latorre	[9] [10] [12]
7	Pedro López (Pedro Juan López Rodríguez)	[9] [10]
8	Carlos Madriles	[9] [10]
9	Alejandro Martínez	[9] [10]
10	Raúl Martínez	[9] [10]
11	Demos Pavlou	[12]
12	F. Jesús Sánchez	[1] [2] [3] [4] [5] [6] [8] [11]
13	Alex Settle	[7]
14	Xavier Vera	[6]

Last update Tue May 29 20:41:18 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page