Swaroop Ghosh

	2011
23		Ashish Goel, Swaroop Ghosh, Mesut Meterelliyoz, Jeff Parkhurst, Kaushik Roy: Integrated Design & Test: Conquering the Conflicting Requirements of Low-Power, Variation-Tolerance and Test Cost. Asian Test Symposium 2011: 486-491
22		Swaroop Ghosh, Kaushik Roy: Novel Low Overhead Post-Silicon Self-Correction Technique for Parallel Prefix Adders Using Selective Redundancy and Adaptive Clocking. IEEE Trans. VLSI Syst. 19(8): 1504-1507 (2011)
	2010
21		Patrick Ndai, Nauman Rafique, Mithuna Thottethodi, Swaroop Ghosh, Swarup Bhunia, Kaushik Roy: Trifecta: A Nonspeculative Scheme to Exploit Common, Data-Dependent Subcritical Paths. IEEE Trans. VLSI Syst. 18(1): 53-65 (2010)
20		Swaroop Ghosh, Debabrata Mohapatra, Georgios Karakonstantis, Kaushik Roy: Voltage Scalable High-Speed Robust Hybrid Arithmetic Units Using Adaptive Clocking. IEEE Trans. VLSI Syst. 18(9): 1301-1309 (2010)
	2009
19		Nilanjan Banerjee, Saumya Chandra, Swaroop Ghosh, Sujit Dey, Anand Raghunathan, Kaushik Roy: Coping with Variations through System-Level Design. VLSI Design 2009: 581-586
	2008
18		Swaroop Ghosh, Kaushik Roy: Exploring high-speed low-power hybrid arithmetic units at scaled supply and adaptive clock-stretching. ASP-DAC 2008: 635-640
17		Swaroop Ghosh, Patrick Ndai, Kaushik Roy: A Novel Low Overhead Fault Tolerant Kogge-Stone Adder Using Adaptive Clocking. DATE 2008: 366-371
16		Swaroop Ghosh, Jung Hwan Choi, Patrick Ndai, Kaushik Roy: O2C: occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors. ISLPED 2008: 189-192
15		Jing Li, Aditya Bansal, Swaroop Ghosh, Kaushik Roy: An alternate design paradigm for low-power, low-cost, testable hybrid systems using scaled LTPS TFTs. JETC 4(3): (2008)
	2007
14		Swaroop Ghosh, Swarup Bhunia, Kaushik Roy: Low-overhead circuit synthesis for temperature adaptation using dynamic voltage scheduling. DATE 2007: 1532-1537
13		Swaroop Ghosh, Patrick Ndai, Swarup Bhunia, Kaushik Roy: Tolerance to Small Delay Defects by Adaptive Clock Stretching. IOLTS 2007: 244-252
12		Jing Li, Swaroop Ghosh, Kaushik Roy: A generic and reconfigurable test paradigm using Low-cost integrated Poly-Si TFTs. ITC 2007: 1-10
11		Swaroop Ghosh, Swarup Bhunia, Kaushik Roy: Low-Power and testable circuit synthesis using Shannon decomposition. ACM Trans. Design Autom. Electr. Syst. 12(4): (2007)
10		Swaroop Ghosh, Swarup Bhunia, Kaushik Roy: CRISTA: A New Paradigm for Low-Power, Variation-Tolerant, and Adaptive Circuit Synthesis Using Critical Path Isolation. IEEE Trans. on CAD of Integrated Circuits and Systems 26(11): 1947-1956 (2007)
	2006
9		Swaroop Ghosh, Saibal Mukhopadhyay, Keejong Kim, Kaushik Roy: Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM. DAC 2006: 971-976
8		Swaroop Ghosh, Swarup Bhunia, Kaushik Roy: A new paradigm for low-power, variation-tolerant circuit synthesis using critical path isolation. ICCAD 2006: 619-624
7		Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy: Delay Fault Localization in Test-Per-Scan BIST Using Built-In Delay Sensor. IOLTS 2006: 31-36
6		Swaroop Ghosh, Swarup Bhunia, Arijit Raychowdhury, Kaushik Roy: A Novel Delay Fault Testing Methodology Using Low-Overhead Built-In Delay Sensor. IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2934-2943 (2006)
	2005
5		Swaroop Ghosh, Swarup Bhunia, Kaushik Roy: Shannon Expansion Based Supply-Gated Logic for Improved Power and Testability. Asian Test Symposium 2005: 404-409
4		Arijit Raychowdhury, Swaroop Ghosh, Kaushik Roy: A Novel On-Chip Delay Measurement Hardware for Efficient Speed-Binning. IOLTS 2005: 287-292
3		Vinod Narayanan, Swaroop Ghosh, Wen-Ben Jone, Sunil R. Das: A built-in self-testing method for embedded multiport memory arrays. IEEE T. Instrumentation and Measurement 54(5): 1721-1738 (2005)
	2004
2		Swaroop Ghosh, K. W. Lai, Wen-Ben Jone, Shih-Chieh Chang: Scan Chain Fault Identification Using Weight-Based Codes for SoC Circuits. Asian Test Symposium 2004: 210-215
	2003
1		J. H. Jiang, Wen-Ben Jone, Shih-Chieh Chang, Swaroop Ghosh: Embedded core test generation using broadcast test architecture and netlist scrambling. IEEE Transactions on Reliability 52(4): 435-443 (2003)

Coauthor Index

1	Nilanjan Banerjee	[19]
2	Aditya Bansal	[15]
3	Swarup Bhunia	[5] [6] [7] [8] [10] [11] [13] [14] [21]
4	Saumya Chandra	[19]
5	Shih-Chieh Chang	[1] [2]
6	Jung Hwan Choi	[16]
7	Sunil R. Das	[3]
8	Sujit Dey	[19]
9	Ashish Goel	[23]
10	J. H. Jiang	[1]
11	Wen-Ben Jone	[1] [2] [3]
12	Georgios Karakonstantis	[20]
13	Keejong Kim	[9]
14	K. W. Lai	[2]
15	Jing Li	[12] [15]
16	Mesut Meterelliyoz	[23]
17	Debabrata Mohapatra	[20]
18	Saibal Mukhopadhyay	[9]
19	Vinod Narayanan	[3]
20	Patrick Ndai	[13] [16] [17] [21]
21	Jeff Parkhurst	[23]
22	Nauman Rafique	[21]
23	Anand Raghunathan	[19]
24	Arijit Raychowdhury	[4] [6] [7]
25	Kaushik Roy	[4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23]
26	Mithuna Thottethodi	[21]

Colors in the list of coauthors

Last update Wed May 30 22:34:44 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page