 | 2011 |
| 16 |  | Santosh Ghosh,
Dipanwita Roy Chowdhury,
Abhijit Das:
High Speed Cryptoprocessor for η T Pairing on 128-bit Secure Supersingular Elliptic Curves over Characteristic Two Fields.
CHES 2011: 442-458 |
| 15 |  | Santosh Ghosh:
Design and Analysis of Pairing Based Cryptographic Hardware for Prime Fields.
ISVLSI 2011: 363-364 |
| 14 |  | Santosh Ghosh,
Dipanwita Roy Chowdhury:
Security of Prime Field Pairing Cryptoprocessor against Differential Power Attack.
InfoSecHiComNet 2011: 16-29 |
| 13 |  | Santosh Ghosh,
Debdeep Mukhopadhyay,
Dipanwita Roy Chowdhury:
Fault Attack, Countermeasures on Pairing Based Cryptography.
I. J. Network Security 12(1): 21-28 (2011) |
| 12 |  | Santosh Ghosh,
Debdeep Mukhopadhyay,
Dipanwita Roy Chowdhury:
Security of Prime Field Pairing Cryptoprocessor Against Differential Power Attack.
IACR Cryptology ePrint Archive 2011: 181 (2011) |
| 11 |  | Santosh Ghosh,
Debdeep Mukhopadhyay,
Dipanwita Roy Chowdhury:
Petrel: Power and Timing Attack Resistant Elliptic Curve Scalar Multiplier Based on Programmable GF(p) Arithmetic Unit.
IEEE Trans. on Circuits and Systems 58-I(8): 1798-1812 (2011) |
| 2010 |
| 10 |  | Santosh Ghosh,
Debdeep Mukhopadhyay,
Dipanwita Roy Chowdhury:
High speed Fp multipliers and adders on FPGA platform.
DASIP 2010: 21-26 |
| 9 |  | Santosh Ghosh,
Debdeep Mukhopadhyay,
Dipanwita Roy Chowdhury:
High Speed Flexible Pairing Cryptoprocessor on FPGA Platform.
Pairing 2010: 450-466 |
| 2009 |
| 8 |  | Santosh Ghosh,
Monjur Alam,
Dipanwita Roy Chowdhury,
Indranil Sengupta:
Parallel crypto-devices for GF(p) elliptic curve multiplication resistant against side channel attacks.
Computers & Electrical Engineering 35(2): 329-338 (2009) |
| 2008 |
| 7 |  | Santosh Ghosh,
Monjur Alam,
Dipanwita Roy Chowdhury,
Indranil Sengupta:
A GF(p) elliptic curve group operator resistant against side channel attacks.
ACM Great Lakes Symposium on VLSI 2008: 53-58 |
| 6 |  | Monjur Alam,
Santosh Ghosh,
Dipanwita Roy Chowdhury,
Indranil Sengupta:
Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm.
VLSI Design 2008: 693-698 |
| 2007 |
| 5 |  | Monjur Alam,
Sonai Ray,
Debdeep Mukhopadhyay,
Santosh Ghosh,
Dipanwita Roy Chowdhury,
Indranil Sengupta:
An area optimized reconfigurable encryptor for AES-Rijndael.
DATE 2007: 1116-1121 |
| 4 |  | Santosh Ghosh,
Monjur Alam,
Indranil Sengupta,
Dipanwita Roy Chowdhury:
A Robust GF(p) Parallel Arithmetic Unit for Public Key Cryptography.
DSD 2007: 109-115 |
| 3 |  | Avishek Saha,
Santosh Ghosh:
A Speed-Area Optimization of Full Search Block Matching Hardware with Applications in High-Definition TVs (HDTV).
HiPC 2007: 83-94 |
| 2 |  | Santosh Ghosh,
Avishek Saha:
Speed-area optimized FPGA implementation for Full Search Block Matching.
ICCD 2007: 13-18 |
| 1 |  | Avishek Saha,
Santosh Ghosh,
Shamik Sural,
Jayanta Mukherjee:
Toward Memory-efficient Design of Video Encoders for Multimedia Applications.
ISVLSI 2007: 453-454 |