 | 2011 |
|---|
| 5 |       | Hamid Reza Ghasemi,
Stark C. Draper,
Nam Sung Kim:
Low-voltage on-chip cache architecture using heterogeneous cell sizes for high-performance processors.
HPCA 2011: 38-49 |
| 2010 |
|---|
| 4 | | Shi-Ting Zhou,
Sumeet Katariya,
Hamid Reza Ghasemi,
Stark C. Draper,
Nam Sung Kim:
Minimizing total area of low-voltage SRAM arrays through joint optimization of cell size, redundancy, and ECC.
ICCD 2010: 112-117 |
| 3 | | Jungseob Lee,
Chi-Chao Wang,
Hamid Reza Ghasemi,
Lloyd Bircher,
Yu Cao,
Nam Sung Kim:
Workload-adaptive process tuning strategy for power-efficient multi-core processors.
ISLPED 2010: 225-230 |
| 2006 |
|---|
| 2 | | Somayeh Sardashti,
Hamid Reza Ghasemi,
Omid Fatemi:
Muli-Issue Multi-Threaded Stream Processor.
ICME 2006: 2041-2044 |
| 2005 |
|---|
| 1 | | Hamid Reza Ghasemi,
Zainalabedin Navabi:
An Effective VHDL-AMS Simulation Algorithm with Event Partitioning.
VLSI Design 2005: 762-767 |
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