Jim D. Garside

	2012
34		Geoffrey Ndu, Jim D. Garside: Boosting Single Thread Performance in Mobile Processors via Reconfigurable Acceleration. ARC 2012: 114-125
33		Wei Song, Doug Edwards, Jim D. Garside, William J. Bainbridge: Area efficient asynchronous SDM routers using 2-stage Clos switches. DATE 2012: 1495-1500
	2011
32		Luis A. Plana, David M. Clark, Simon Davidson, Steve Furber, Jim D. Garside, Eustace Painkras, Jeffrey Pepper, Steve Temple, John Bainbridge: SpiNNaker: Design and Implementation of a GALS Multicore System-on-Chip. JETC 7(4): 17 (2011)
	2009
31		Jim D. Garside, Stephen B. Furber, Steve Temple, Viv Woods: The Amulet chips: Architectural development for asynchronous microprocessors. ICECS 2009: 343-346
	2008
30		Konstantinos Nikas, Matthew Horsnell, Jim D. Garside: An adaptive bloom filter cache partitioning scheme for multicore architectures. ICSAMOS 2008: 25-32
	2007
29		A. Robinson, Jim D. Garside: Sensitive registers: a technique for reducing the fetch bandwidth in low-power microprocessors. ACM Great Lakes Symposium on VLSI 2007: 138-143
	2005
28		Aristides Efthymiou, Jim D. Garside, Ioannis Papaefstathiou: A Low-Power Processor Architecture Optimized forWireless Devices. ASAP 2005: 185-190
27		C. Brej, Jim D. Garside: A Quasi-Delay-Insensitive Method to Overcome Transistor Variation. VLSI Design 2005: 368-373
	2004
26		Aristides Efthymiou, W. Suntiamorntut, Jim D. Garside, L. E. M. Brackenbury: An Asynchronous, Iterative Implementation of the Original Booth Multiplication Algorithm. ASYNC 2004: 207-215
25		Aristides Efthymiou, Jim D. Garside: A CAM with mixed serial-parallel comparison for use in low energy caches. IEEE Trans. VLSI Syst. 12(3): 325-329 (2004)
	2003
24		Aristides Efthymiou, Jim D. Garside: Adaptive Pipeline Structures fo Speculation Control. ASYNC 2003: 46-55
23		Daranee Hormdee, Jim D. Garside, Stephen B. Furber: An asynchronous copy-back cache architecture. Microprocessors and Microsystems 27(10): 485-500 (2003)
22		Luis A. Plana, P. A. Riocreux, W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, Z. C. Yu: SPA - a secure Amulet core for smartcard applications. Microprocessors and Microsystems 27(9): 431-446 (2003)
	2002
21		W. J. Bainbridge, Andrew Bardsley, Steve Temple, Jim D. Garside, P. A. Riocreux, Luis A. Plana: SPA - A Synthesisable Amulet Core for Smartcard pplications. ASYNC 2002: 201-210
20		Daranee Hormdee, Jim D. Garside, Stephen B. Furber: An Asynchronous Victim Cache. DSD 2002: 4-11
19		Aristides Efthymiou, Jim D. Garside: Adaptive Pipeline Depth Control for Processor Power-Management. ICCD 2002: 454-457
18		Aristides Efthymiou, Jim D. Garside: An adaptive serial-parallel CAM architecture for low-power cache blocks. ISLPED 2002: 136-141
17		Jordi Cortadella, Alexandre Yakovlev, Jim D. Garside: Logic Design of Asynchronous Circuits (Tutorial Abstract). VLSI Design 2002: 26-
	2001
16		Daranee Hormdee, Jim D. Garside: AMULET3i Cache Architecture. ASYNC 2001: 152-161
15		David W. Lloyd, Jim D. Garside: A Practical Comparison of Asynchronous Design Styles. ASYNC 2001: 36-45
14		Stephen B. Furber, Aristides Efthymiou, Jim D. Garside, David W. Lloyd, Mike J. G. Lewis, Steve Temple: Power Management in the Amulet Microprocessors. IEEE Design & Test of Computers 18(2): 42-52 (2001)
	2000
13		Jim D. Garside, W. J. Bainbridge, Andrew Bardsley, David M. Clark, David A. Edwards, Stephen B. Furber, David W. Lloyd, S. Mohammadi, J. S. Pepper, Steve Temple, John V. Woods, Jianwei Liu, O. Petli: AMULET3i - An Asynchronous System-on-Chip. ASYNC 2000: 162-175
12		Stephen B. Furber, David A. Edwards, Jim D. Garside: AMULET3: A 100 MIPS Asynchronous Embedded Processor. ICCD 2000: 329-334
	1999
11		Mike J. G. Lewis, Jim D. Garside, L. E. M. Brackenbury: Reconfigurable Latch Controllers for Low Power Asynchronous Circuits. ASYNC 1999: 27-35
10		Jim D. Garside, Stephen B. Furber, S.-H. Chung: AMULET3 Revealed. ASYNC 1999: 51-59
9		David W. Lloyd, Jim D. Garside, D. A. Gilbert: Memory Faults in Asynchronous Microprocessors. ASYNC 1999: 71-
	1997
8		D. A. Gilbert, Jim D. Garside: A Result Forwarding Mechanism for Asynchronous Pipelined Systems. ASYNC 1997: 2-11
7		Stephen B. Furber, Jim D. Garside, Steve Temple, Jianwei Liu, P. Day, N. C. Paver: AMULET2e: An Asynchronous Embedded Controller. ASYNC 1997: 290-
6		John V. Woods, P. Day, Stephen B. Furber, Jim D. Garside, N. C. Paver, Steve Temple: AMULET1: A Asynchronous ARM Microprocessor. IEEE Trans. Computers 46(4): 385-398 (1997)
	1994
5		Stephen B. Furber, P. Day, Jim D. Garside, N. C. Paver, John V. Woods: AMULET1: A Micropipelined ARM. COMPCON 1994: 476-485
4		Stephen B. Furber, P. Day, Jim D. Garside, N. C. Paver, Steve Temple, John V. Woods: The Design and Evaluation of an Asynchronous Microprocessor. ICCD 1994: 217-220
	1993
3		Jim D. Garside: A CMOS VLSI Implementation of an Asynchronous ALU. Asynchronous Design Methodologies 1993: 181-192
2		Stephen B. Furber, P. Day, Jim D. Garside, N. C. Paver, John V. Woods: A micropipelined ARM. VLSI 1993: 211-220
	1992
1		N. C. Paver, P. Day, Stephen B. Furber, Jim D. Garside, John V. Woods: Register Locking in an Asynchronous Microprocessor. ICCD 1992: 351-355

Coauthor Index

1	John Bainbridge	[32]
2	W. J. Bainbridge	[13] [21] [22]
3	William J. Bainbridge	[33]
4	Andrew Bardsley	[13] [21] [22]
5	Linda E. M. Brackenbury (L. E. M. Brackenbury)	[11] [26]
6	C. Brej	[27]
7	S.-H. Chung	[10]
8	David M. Clark	[13] [32]
9	Jordi Cortadella	[17]
10	Simon Davidson	[32]
11	P. Day	[1] [2] [4] [5] [6] [7]
12	David A. Edwards	[12] [13]
13	Doug Edwards	[33]
14	Aristides Efthymiou	[14] [18] [19] [24] [25] [26] [28]
15	Stephen B. Furber (Steve Furber)	[1] [2] [4] [5] [6] [7] [10] [12] [13] [14] [20] [23] [31] [32]
16	D. A. Gilbert	[8] [9]
17	Daranee Hormdee	[16] [20] [23]
18	Matthew Horsnell	[30]
19	Mike J. G. Lewis	[11] [14]
20	Jianwei Liu	[7] [13]
21	David W. Lloyd	[9] [13] [14] [15]
22	S. Mohammadi	[13]
23	Geoffrey Ndu	[34]
24	Konstantinos Nikas	[30]
25	Eustace Painkras	[32]
26	Ioannis Papaefstathiou	[28]
27	Nigel C. Paver (N. C. Paver)	[1] [2] [4] [5] [6] [7]
28	J. S. Pepper	[13]
29	Jeffrey Pepper	[32]
30	O. Petli	[13]
31	Luis A. Plana	[21] [22] [32]
32	P. A. Riocreux	[21] [22]
33	A. Robinson	[29]
34	Wei Song	[33]
35	W. Suntiamorntut	[26]
36	Steve Temple	[4] [6] [7] [13] [14] [21] [22] [31] [32]
37	John V. Woods	[1] [2] [4] [5] [6] [13]
38	Viv Woods	[31]
39	Alexandre Yakovlev (Alex Yakovlev)	[17]
40	Z. C. Yu	[22]

Colors in the list of coauthors

Last update Wed May 30 22:34:44 2012 CET by the DBLP Team — Data released under the ODC-BY 1.0 license — See also our legal information page