Oscar Garnica

	2011
29		Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo: A phase adaptive cache hierarchy for SMT processors. Microprocessors and Microsystems - Embedded Hardware Design 35(8): 683-694 (2011)
	2010
28		Sonia López, Oscar Garnica, David H. Albonesi, Steven G. Dropsho, Juan Lanchares, José Ignacio Hidalgo: Adaptive Cache Memories for SMT Processors. DSD 2010: 331-338
27		José Manuel Colmenar, José L. Risco-Martín, David Atienza, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares: Improving reliability of embedded systems through dynamic memory manager optimization using grammatical evolution. GECCO 2010: 1227-1234
26		Josefa Díaz, Francisco Fernández de Vega, José Ignacio Hidalgo, Oscar Garnica: Parisian Approach - Reducing Computational Effort to Improve SMT Performance by setting Resizable Caches. IJCCI (ICEC) 2010: 275-280
25		J. Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo: Simulating a LAGS processor to consider variable latency on L1 D-Cache. SummerSim 2010: 56-63
24		José L. Risco-Martín, David Atienza, José Manuel Colmenar, Oscar Garnica: A parallel evolutionary algorithm to optimize dynamic memory managers in embedded systems. Parallel Computing 36(10-11): 572-590 (2010)
	2009
23		José Luis Risco-Martín, José Ignacio Hidalgo, David Atienza, Juan Lanchares, Oscar Garnica: Mixed heuristic and mathematical programming using reference points for dynamic data types optimization in multimedia embedded systems. GECCO 2009: 1601-1608
22		Josefa Díaz, José Ignacio Hidalgo, Francisco Fernández, Oscar Garnica, Sonia López: Improving SMT performance: an application of genetic algorithms to configure resizable caches. GECCO (Companion) 2009: 2029-2034
21		José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo: Characterizing asynchronous variable latencies through probability distribution functions. Microprocessors and Microsystems - Embedded Hardware Design 33(7-8): 483-497 (2009)
	2008
20		José L. Risco-Martín, José Ignacio Hidalgo, Juan Lanchares, Oscar Garnica: Solving discrete deceptive problems with EMMRS. GECCO 2008: 1139-1140
19		José Manuel Colmenar, Noelia Morón, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo: Modelling Asynchronous Systems using Probability Distribution Functions. PDP 2008: 3-11
18		José L. Risco-Martín, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, David Atienza: Particle swarm optimisation of memory usage in embedded systems. IJHPSA 1(4): 209-219 (2008)
	2007
17		Sonia López, Steve Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares: Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches. HiPEAC 2007: 136-150
16		Sonia López, Steven G. Dropsho, David H. Albonesi, Oscar Garnica, Juan Lanchares: Rate-Driven Control of Resizable Caches for Highly Threaded SMT Processors. PACT 2007: 416
15		Guadalupe Miñana, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar, Oscar Garnica, Sonia López: Reducing power of functional units in high-performance processors by checking instruction codes and resizing adders. IET Computers & Digital Techniques 1(2): 113-119 (2007)
	2006
14		José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López: Comparing the Performance of a 64-bit Fully-Asynchronous Superscalar Processor versus its Synchronous Counterpart. DSD 2006: 423-432
13		Guadalupe Miñana, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar: A Power-Aware Technique for Functional Units in High-Performance Processors. DSD 2006: 456-459
12		José Manuel Colmenar, Oscar Garnica, Juan Lanchares, José Ignacio Hidalgo, Guadalupe Miñana, Sonia López: Sim-async: An Architectural Simulator for Asynchronous Processor Modeling Using Distribution Functions. Euro-Par 2006: 495-505
11		Guadalupe Miñana, José Ignacio Hidalgo, Oscar Garnica, Juan Lanchares, José Manuel Colmenar, Sonia López: A Technique to Reduce Static and Dynamic Power of Functional Units in High-Performance Processors. PATMOS 2006: 514-523
	2005
10		Guadalupe Miñana, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, José Manuel Colmenar: Power Reduction of Superscalar Processor Functional Units by Resizing Adder-Width. PATMOS 2005: 40-48
	2004
9		Sonia López, Oscar Garnica, José Manuel Colmenar: Enhancing GALS Processor Performance Using Data Classification Based on Data Latency. PATMOS 2004: 623-632
8		José Manuel Colmenar, Oscar Garnica, Sonia López, José Ignacio Hidalgo, Juan Lanchares, Román Hermida: Empirical Characterization of the Latency of Long Asynchronous Pipelines with Data-Dependent Module Delays. PDP 2004: 112-119
	2003
7		José Ignacio Hidalgo, Francisco Fernández de Vega, Juan Lanchares, Juan Manuel Sánchez-Pérez, Román Hermida, Marco Tomassini, Ranieri Baraglia, Raffaele Perego, Oscar Garnica: Multi-FPGA Systems Synthesis by Means of Evolutionary Computation. GECCO 2003: 2109-2120
6		Sonia López, Oscar Garnica, José Ignacio Hidalgo, Juan Lanchares, Román Hermida: Power-Consumption RRRRreduction in Asynchronous Circuits Using Delay Path Unequalization. PATMOS 2003: 151-160
5		José Ignacio Hidalgo, Manuel Prieto, Juan Lanchares, Ranieri Baraglia, Francisco Tirado, Oscar Garnica: Hybrid Parallelization of a Compact Genetic Algorithm. PDP 2003: 449-455
	2002
4		Oscar Garnica, Juan Lanchares, Román Hermida: A New Methodology to Design Low-Power Asynchronous Circuits. PATMOS 2002: 108-117
3		Oscar Garnica, Juan Lanchares, Román Hermida: Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation. Fundam. Inform. 50(2): 155-174 (2002)
	2001
2		Oscar Garnica, Juan Lanchares, Román Hermida: Optimization of Asynchronous Delay-Insensitive Pipeline Latency Using Stage Reorganization and Optimal Stage Parameter Estimation. ACSD 2001: 167-178
1		Oscar Garnica, Juan Lanchares, Román Hermida: A pseudo delay-insensitive timing model to synthesizing low-power asynchronous circuits. DATE 2001: 810

Coauthor Index

1	David H. Albonesi	[16] [17] [28] [29]
2	David Atienza (David Atienza Alonso)	[18] [23] [24] [27]
3	Ranieri Baraglia	[5] [7]
4	J. Manuel Colmenar	[25]
5	José Manuel Colmenar	[8] [9] [10] [11] [12] [13] [14] [15] [19] [21] [24] [27]
6	Josefa Díaz	[22] [26]
7	Steven G. Dropsho (Steve Dropsho)	[16] [17] [28] [29]
8	Francisco Fernández	[22]
9	Román Hermida	[1] [2] [3] [4] [6] [7] [8]
10	José Ignacio Hidalgo	[5] [6] [7] [8] [10] [11] [12] [13] [14] [15] [18] [19] [20] [21] [22] [23] [25] [26] [27] [28] [29]
11	Juan Lanchares	[1] [2] [3] [4] [5] [6] [7] [8] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [23] [25] [27] [28] [29]
12	Sonia López	[6] [8] [9] [11] [12] [14] [15] [16] [17] [22] [28] [29]
13	Guadalupe Miñana	[10] [11] [12] [13] [14] [15]
14	Noelia Morón	[19]
15	Raffaele Perego	[7]
16	Manuel Prieto (Manuel Prieto-Matías)	[5]
17	José Luis Risco-Martín (José L. Risco-Martín)	[18] [20] [23] [24] [27]
18	Juan Manuel Sánchez-Pérez	[7]
19	Francisco Tirado	[5]
20	Marco Tomassini	[7]
21	Francisco Fernández de Vega	[7] [26]

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