Annajirao Garimella

	2012
7		Annajirao Garimella, Punith R. Surkanti, Paul M. Furth: Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview. VLSI Design 2012: 131-136
6		Annajirao Garimella, Punith R. Surkanti, Paul M. Furth: Embedded Tutorial ET1: Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview. VLSI Design 2012: 31-32
	2010
5		Annajirao Garimella, M. Wasequr Rashid, Paul M. Furth: Single Miller compensation using inverting current buffer for multi-stage amplifiers. ISCAS 2010: 1579-1582
4		Annajirao Garimella, M. Wasequr Rashid, Paul M. Furth: Reverse Nested Miller Compensation Using Current Buffers in a Three-Stage LDO. IEEE Trans. on Circuits and Systems 57-II(4): 250-254 (2010)
	2009
3		Annajirao Garimella, Paul M. Furth: A 1.21V, 100mA, 0.1µF-10µF output capacitor low drop-out voltage regulator for SoC applications. ICECS 2009: 375-378
	2008
2		Jaime Ramírez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. López-Martín, Ramón González Carvajal: An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. VLSI Design 2008: 294-299
	2003
1		Annajirao Garimella, M. V. V. Satyanarayana, R. Satish Kumar, P. S. Murugesh, U. C. Niranjan: VLSI Implementation of Online Digital Watermarking Technique with Difference Encoding for 8-Bit Gray Scale Images. VLSI Design 2003: 283-

Coauthor Index

1	Ramón González Carvajal	[2]
2	Paul M. Furth	[3] [4] [5] [6] [7]
3	Sri Raga Sudha Garimella	[2]
4	Lalitha Mohana Kalyani-Garimella	[2]
5	R. Satish Kumar	[1]
6	Antonio J. López-Martín	[2]
7	P. S. Murugesh	[1]
8	U. C. Niranjan	[1]
9	Jaime Ramírez-Angulo	[2]
10	M. Wasequr Rashid	[4] [5]
11	M. V. V. Satyanarayana	[1]
12	Punith R. Surkanti	[6] [7]

Colors in the list of coauthors

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