Siddharth Garg

	2012
17		Sundaram Ananthanarayanan, Chirag Ravishankar, Siddharth Garg, Andrew A. Kennings: EmPower: FPGA based emulation of dynamic power management algorithms for multi-core systems on chip (abstract only). FPGA 2012: 266
16		Chirag Ravishankar, Sundaram Ananthanarayanan, Siddharth Garg, Andrew A. Kennings: Analysis and evaluation of greedy thread swapping based dynamic power management for MPSoC platforms. ISQED 2012: 617-624
	2011
15		Da-Cheng Juan, Siddharth Garg, Diana Marculescu: Statistical thermal evaluation and mitigation techniques for 3D Chip-Multiprocessors in the presence of process variations. DATE 2011: 383-388
14		Siddharth Garg, Diana Marculescu: Special session 4A: New topics parametric yield and reliability of 3D integrated circuits: New challenges and solutions. VTS 2011: 99
13		Siddharth Garg, Shreyas Sundaram, Hiren D. Patel: Robust heterogeneous data center design: a principled approach. SIGMETRICS Performance Evaluation Review 39(3): 28-30 (2011)
	2010
12		Siddharth Garg, Diana Marculescu, Sebastian Herbert: Process variation aware performance modeling and dynamic power management for multi-core systems. ICCAD 2010: 89-92
11		Siddharth Garg, Diana Marculescu, Radu Marculescu: Custom feedback control: enabling truly scalable on-chip power management for MPSoCs. ISLPED 2010: 425-430
	2009
10		Siddharth Garg, Diana Marculescu, Radu Marculescu, Ümit Y. Ogras: Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective. DAC 2009: 818-821
9		Siddharth Garg, Diana Marculescu: System-level process variability analysis and mitigation for 3D MPSoCs. DATE 2009: 604-609
8		Siddharth Garg, Diana Marculescu: 3D-GCP: An analytical model for the impact of process variations on the critical path delay distribution of 3D ICs. ISQED 2009: 147-155
	2008
7		Siddharth Garg, Diana Marculescu: System-level mitigation of WID leakage power variability using body-bias islands. CODES+ISSS 2008: 273-278
6		Siddharth Garg, Diana Marculescu: System-level throughput analysis for process variation aware multiple voltage-frequency island designs. ACM Trans. Design Autom. Electr. Syst. 13(4): (2008)
5		Diana Marculescu, Siddharth Garg: Process-Driven Variability Analysis of Single and Multiple Voltage-Frequency Island Latency-Constrained Systems. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 893-905 (2008)
	2007
4		Siddharth Garg, Diana Marculescu: On the impact of manufacturing process variations on the lifetime of sensor networks. CODES+ISSS 2007: 203-208
3		Siddharth Garg, Diana Marculescu: Interactive presentation: System-level process variation driven throughput analysis for single and multiple voltage-frequency island designs. DATE 2007: 403-408
	2006
2		Diana Marculescu, Siddharth Garg: System-level process-driven variability analysis for single and multiple voltage-frequency island systems. ICCAD 2006: 541-546
	2004
1		Siddharth Garg, Siddharth Tata, Ravishankar Arunachalam: Static Transition Probability Analysis Under Uncertainty. ICCD 2004: 380-386

Coauthor Index

1	Sundaram Ananthanarayanan	[16] [17]
2	Ravishankar Arunachalam	[1]
3	Sebastian Herbert	[12]
4	Da-Cheng Juan	[15]
5	Andrew A. Kennings	[16] [17]
6	Diana Marculescu	[2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [14] [15]
7	Radu Marculescu	[10] [11]
8	Ümit Y. Ogras	[10]
9	Hiren D. Patel	[13]
10	Chirag Ravishankar	[16] [17]
11	Shreyas Sundaram	[13]
12	Siddharth Tata	[1]

Colors in the list of coauthors

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