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| 2011 | ||
|---|---|---|
| 4 | Jose Luis Garcia-Gervacio, Víctor H. Champac: Computing the Detection Probability for Small Delay Defects of Nanometer ICs. J. Electronic Testing 27(6): 741-752 (2011) | |
| 2010 | ||
| 3 | Jose Luis Garcia-Gervacio, Víctor H. Champac: Computing the detection of Small Delay Defects caused by resistive opens of nanometer ICs. European Test Symposium 2010: 126-131 | |
| 2009 | ||
| 2 | Jose Luis Garcia-Gervacio, Víctor H. Champac: Detectability analysis of small delays due to resistive opens considering process variations. IOLTS 2009: 195-197 | |
| 2008 | ||
| 1 | Daniel Iparraguirre-Cardenas, Jose Luis Garcia-Gervacio, Víctor H. Champac: A design methodology for logic paths tolerant to local intra-die variations. ISCAS 2008: 596-599 | |
| 1 | Víctor H. Champac (Víctor H. Champac Vilela) | [1] [2] [3] [4] |
| 2 | Daniel Iparraguirre-Cardenas | [1] |
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