 | 2009 |
|---|
| 5 |       | Shubhalaxmi Kher,
T. S. Ganesh,
Prem Ramesh,
Arun K. Somani:
Greedy Dynamic Crossover Management in Hardware Accelerated Genetic Algorithm Implementations Using FPGA.
UKSim 2009: 47-52 |
| 2007 |
|---|
| 4 | | T. S. Ganesh,
Michael T. Frederick,
T. S. B. Sudarshan,
Arun K. Somani:
Hashchip: A shared-resource multi-hash function processor architecture on FPGA.
Integration 40(1): 11-19 (2007) |
| 2006 |
|---|
| 3 | | T. S. Ganesh,
Viswanathan Subramanian,
Arun K. Somani:
SEU Mitigation Techniques for Microprocessor Control Logic.
EDCC 2006: 77-86 |
| 2005 |
|---|
| 2 |  | T. S. B. Sudarshan,
T. S. Ganesh,
G. Raghurama:
Caching and replacement of streaming objects based on a popularity function.
Communications and Computer Networks 2005: 208-212 |
| 1 | | T. S. Ganesh,
T. S. B. Sudarshan:
ASIC Implementation of a Unified Hardware Architecture for Non-Key Based Cryptographic Hash Primitives.
ITCC (1) 2005: 580-585 |
Data released under the ODC-BY 1.0 license — See also our legal information page