 | 2011 |
|---|
| 8 |       | Zbysek Gajda,
Lukás Sekanina:
On Evolutionary Synthesis of Compact Polymorphic Combinational Circuits.
Multiple-Valued Logic and Soft Computing 17(5-6): 607-631 (2011) |
| 2010 |
|---|
| 7 | | Zbysek Gajda,
Lukás Sekanina:
When does Cartesian genetic programming minimize the phenotype size implicitly?
GECCO 2010: 983-984 |
| 6 | | Zbysek Gajda,
Lukás Sekanina:
An Efficient Selection Strategy for Digital Circuit Evolution.
ICES 2010: 13-24 |
| 2009 |
|---|
| 5 | | Zbysek Gajda,
Lukás Sekanina:
Gate-level optimization of polymorphic circuits using Cartesian Genetic Programming.
IEEE Congress on Evolutionary Computation 2009: 1599-1604 |
| 2008 |
|---|
| 4 | | Lukás Sekanina,
Lukás Starecek,
Zdenek Kotásek,
Zbysek Gajda:
Polymorphic Gates in Design and Test of Digital Circuits.
IJUC 4(2): 125-142 (2008) |
| 2007 |
|---|
| 3 | | Zbysek Gajda,
Lukás Sekanina:
Reducing the number of transistors in digital circuits using gate-level evolutionary design.
GECCO 2007: 245-252 |
| 2006 |
|---|
| 2 | | Lukás Sekanina,
Lukás Starecek,
Zbysek Gajda,
Zdenek Kotásek:
Evolution of Multifunctional Combinational Modules Controlled by the Power Supply Voltage.
AHS 2006: 186-193 |
| 1 |  | Zbysek Gajda:
A Core Generator for Multi-ALU Processors Utilized in Genetic Parallel Programming.
DDECS 2006: 238-240 |
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