![]() | ![]() |
| 1992 | ||
|---|---|---|
| 2 | Michel Dagenais, Serge Gaiotti, Nicholas C. Rumin: Transistor-level estimation of worst-case delays in MOS VLSI circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 11(3): 384-395 (1992) | |
| 1989 | ||
| 1 | Serge Gaiotti, Michel Dagenais, Nicholas C. Rumin: Worst-case Delay Estimation of Transistor Groups. DAC 1989: 491-495 | |
| 1 | Michel Dagenais (Michel R. Dagenais) | [1] [2] |
| 2 | Nicholas C. Rumin | [1] [2] |
Data released under the ODC-BY 1.0 license — See also our legal information page