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| 2010 | ||
|---|---|---|
| 3 | Bo Liu, Toru Fujimura, Bo Yang, Shigetoshi Nakatake: D-A converter based variation analysis for analog layout design. ASP-DAC 2010: 843-848 | |
| 2008 | ||
| 2 | Toru Fujimura, Shigetoshi Nakatake: Transistor-level programmable MOS analog IC with body biasing. ISCAS 2008: 153-156 | |
| 2006 | ||
| 1 | Takashi Nojima, Nobuto Ono, Shigetoshi Nakatake, Toru Fujimura, Koji Okazaki, Yoji Kajitani: Adaptive Porting of Analog IPs with Reusable Conservative Properties. ISVLSI 2006: 18-23 | |
| 1 | Yoji Kajitani | [1] |
| 2 | Bo Liu | [3] |
| 3 | Shigetoshi Nakatake | [1] [2] [3] |
| 4 | Takashi Nojima | [1] |
| 5 | Koji Okazaki | [1] |
| 6 | Nobuto Ono | [1] |
| 7 | Bo Yang | [3] |
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