 | 2012 |
| 9 |  | Daisaburo Takashima,
Mitsuhiro Noguchi,
Noboru Shibata,
Kazushige Kanda,
Hiroshi Sukegawa,
Shuso Fujii:
An Embedded DRAM Technology for High-Performance NAND Flash Memories.
J. Solid-State Circuits 47(2): 536-546 (2012) |
| 2011 |
| 8 |  | Daisaburo Takashima,
Mitsuhiro Noguchi,
Noboru Shibata,
Kazushige Kanda,
Hiroshi Sukegawa,
Shuso Fujii:
An embedded DRAM technology for high-performance NAND flash memories.
ISSCC 2011: 504-505 |
| 7 |  | Daisaburo Takashima,
Yasushi Nagadomi,
Kosuke Hatsuda,
Yohji Watanabe,
Shuso Fujii:
A 128 Mb Chain FeRAM and System Design for HDD Application and Enhanced HDD Performance.
J. Solid-State Circuits 46(2): 530-536 (2011) |
| 6 |  | Daisaburo Takashima,
Hidehiro Shiga,
Daisuke Hashimoto,
Tadashi Miyakawa,
Shinichiro Shiratake,
Katsuhiko Hoya,
Ryu Ogiwara,
Ryosuke Takizawa,
Ryosuke Doumae,
Ryo Fukuda,
Yohji Watanabe,
Shuso Fujii,
Tohru Ozaki,
Hiroyuki Kanaya,
Susumu Shuto,
Koji Yamakawa,
Iwao Kunishima,
Takeshi Hamamoto,
Akihiro Nitayama:
A Scalable Shield-Bitline-Overdrive Technique for Sub-1.5 V Chain FeRAMs.
J. Solid-State Circuits 46(9): 2171-2179 (2011) |
| 2010 |
| 5 |  | Daisaburo Takashima,
Hidehiro Shiga,
Daisuke Hashimoto,
Tadashi Miyakawa,
Shinichiro Shiratake,
Katsuhiko Hoya,
Ryu Ogiwara,
Ryosuke Takizawa,
Ryosuke Doumae,
Ryo Fukuda,
Yohji Watanabe,
Shuso Fujii,
Tohru Ozaki,
Hiroyuki Kanaya,
Susumu Shuto,
Koji Yamakawa,
Iwao Kunishima,
Takeshi Hamamoto,
Akihiro Nitayama:
A scalable shield-bitline-overdrive technique for 1.3V Chain FeRAM.
ISSCC 2010: 262-263 |
| 4 |  | Katsuhiko Hoya,
Daisaburo Takashima,
Shinichiro Shiratake,
Ryu Ogiwara,
Tadashi Miyakawa,
Hidehiro Shiga,
S. M. Doumae,
S. Ohtsuki,
Yoshinori Kumura,
Susumu Shuto,
Tohru Ozaki,
Koji Yamakawa,
Iwao Kunishima,
Akihiro Nitayama,
Shuso Fujii:
A 64-Mb Chain FeRAM With Quad BL Architecture and 200 MB/s Burst Mode.
IEEE Trans. VLSI Syst. 18(12): 1745-1752 (2010) |
| 3 |  | Hidehiro Shiga,
Daisaburo Takashima,
Shinichiro Shiratake,
Katsuhiko Hoya,
Tadashi Miyakawa,
Ryu Ogiwara,
Ryo Fukuda,
Ryosuke Takizawa,
Kosuke Hatsuda,
Fumiyoshi Matsuoka,
Yasushi Nagadomi,
Daisuke Hashimoto,
Hisaaki Nishimura,
Takeshi Hioka,
Sumiko Doumae,
Shoichi Shimizu,
Mitsumo Kawano,
Toyoki Taguchi,
Yohji Watanabe,
Shuso Fujii,
Tohru Ozaki,
Hiroyuki Kanaya,
Yoshinori Kumura,
Yoshiro Shimojo,
Yuki Yamada,
Yoshihiro Minami,
Susumu Shuto,
Koji Yamakawa,
Soichi Yamazaki,
Iwao Kunishima,
Takeshi Hamamoto,
Akihiro Nitayama,
Tohru Furuyama:
A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes.
J. Solid-State Circuits 45(1): 142-152 (2010) |
| 2009 |
| 2 |  | Hidehiro Shiga,
Daisaburo Takashima,
Shinichiro Shiratake,
Katsuhiko Hoya,
Tadashi Miyakawa,
Ryu Ogiwara,
Ryo Fukuda,
Ryosuke Takizawa,
Kosuke Hatsuda,
Fumiyoshi Matsuoka,
Yasushi Nagadomi,
Daisuke Hashimoto,
Hisaaki Nishimura,
Takeshi Hioka,
Sumiko Doumae,
Shoichi Shimizu,
Mitsumo Kawano,
Toyoki Taguchi,
Yohji Watanabe,
Shuso Fujii,
Tohru Ozaki,
Hiroyuki Kanaya,
Yoshinori Kumura,
Yoshiro Shimojo,
Yuki Yamada,
Yoshihiro Minami,
Susumu Shuto,
Koji Yamakawa,
Soichi Yamazaki,
Iwao Kunishima,
Takeshi Hamamoto,
Akihiro Nitayama,
Tohru Furuyama:
A 1.6GB/s DDR2 128Mb chain FeRAM with scalable octal bitline and sensing schemes.
ISSCC 2009: 464-465 |
| 2004 |
| 1 |  | Osamu Wada,
Toshimasa Namekawa,
Hiroshi Ito,
Atsushi Nakayama,
Shuso Fujii:
Post-Packaging Auto Repair Techniques for Fast Row Cycle Embedded DRAM.
ITC 2004: 1016-1023 |